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US-20260129191-A1 - METHOD, DEVICE, AND MEDIUM FOR VIDEO PROCESSING

US20260129191A1US 20260129191 A1US20260129191 A1US 20260129191A1US-20260129191-A1

Abstract

Embodiments of the present disclosure provide a solution for video processing. A method for video processing is proposed. The method comprises: processing, during a conversion between a picture of a video and a bitstream of the video, a first video block in the picture based on a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), the DIMD being used for deriving at least one intra prediction mode (IPM); and performing the conversion based on the first video block. Compared with the conventional solution, the proposed method can advantageously improve the coding effectiveness and coding efficiency.

Inventors

  • Yang Wang
  • Li Zhang
  • Kai Zhang

Assignees

  • BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD.
  • BYTEDANCE INC.

Dates

Publication Date
20260507
Application Date
20251229
Priority Date
20210519

Claims (20)

  1. 1 . A method for video processing, comprising: determining, for a conversion between a first video block of a video and a bitstream of the video, whether the first video block is allowed to be coded with a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), based on coded information associated with the first video block; and performing the conversion based on the determination.
  2. 2 . The method of claim 1 , wherein the coded information comprises at least one of the following: block dimensions of the first video block, or a block size of the first video block.
  3. 3 . The method of claim 1 , wherein in accordance with that the first video block is coded with the combination of DIMD and ISP, an intra prediction mode is determined based on DIMD and a prediction for at least one subparitition of the first video block is determined based on the intra prediction mode.
  4. 4 . The method of claim 1 , wherein the coded information comprises information regarding whether at least one of the DIMD or the ISP is allowed for the first video block.
  5. 5 . The method of claim 4 , wherein in accordance with that at least one of the DIMD or the ISP is disallowed for the first video block, the first video block is disallowed to be coded with the combination of the DIMD and the ISP.
  6. 6 . The method of claim 1 , wherein the coded information comprises at least one of the following: a block depth of the first video block, a slice type of the first video block, a picture type of the first video block, a temporal layer of the first video block, a type of the ISP, or a color component of the first video block.
  7. 7 . The method of claim 1 , wherein a single first IPM is determined based on the DIMD, and the single first IPM is used for intra prediction of all subpartitions of the first video block.
  8. 8 . The method of claim 1 , wherein the first video block comprises a plurality of subpartitions, and at least one IPM determined based on the DIMD comprises a first IPM, and a prediction of at least one target subpartition of the plurality of subpartitions is determined based on the first IPM.
  9. 9 . The method of claim 8 , wherein the at least one target subpartition comprises all of the plurality of subpartitions.
  10. 10 . The method of claim 8 , wherein a prediction of rest of the plurality of subpartitions is determined based on at least one second IPM, and the first IPM is different from the at least one second IPM.
  11. 11 . The method of claim 10 , wherein the at least one target subpartition comprises at least one of the first subpartition, the first two subpartitions, the last subpartition, or the last two subpartitions of the at least one target subpartition, and a number of the at least one second IPM is equal to a number of the rest of the plurality of subpartitions, or wherein the at least one second IPM is predefined and comprises at least one of a Planar mode, a DC mode, a horizontal mode, or a vertical mode, or wherein the at least one second IPM is determined based on the first IPM, a mode number of the first IPM is a first number, and at least one mode number of the at least one second IPM is at least one of a sum of the first number and a second number or a difference between the first number and the second number, the first number and the second number are integers.
  12. 12 . The method of claim 1 , wherein whether and/or how at least one coding tool is used for the first video block coded with the combination of the DIMD and the ISP is the same as for a second video block coded with an ISP mode.
  13. 13 . The method of claim 12 , wherein whether and/or how at least one coding tool coding tool is used for the first video block comprises at least one of the following: whether to filter reference samples, or whether to use at least one of an interpolation filter, a position dependent intra prediction combination (PDPC), or a gradient PDPC.
  14. 14 . The method of claim 1 , wherein at least one coding tool is disallowed to be used for the first video block coded with the combination of the DIMD and the ISP.
  15. 15 . The method of claim 1 , wherein whether and/or how a coding tool is used for the first video block coded with the combination of the DIMD and the ISP is different from for a second video block coded with an ISP mode.
  16. 16 . The method of claim 1 , wherein the conversion comprises decoding the first video block from the bitstream.
  17. 17 . The method of claim 1 , wherein the conversion comprises encoding the first video block into the bitstream.
  18. 18 . An apparatus for video processing, comprising a processor and a non-transitory memory coupled to the processor and having instructions stored thereon, wherein the instructions upon execution by the processor, cause the processor to: determine, for a conversion between a first video block of a video and a bitstream of the video, whether the first video block is allowed to be coded with a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), based on coded information associated with the first video block; and perform the conversion based on the determination.
  19. 19 . A non-transitory computer-readable storage medium storing instructions that cause a processor to perform operations comprising: determining, for a conversion between a first video block of a video and a bitstream of the video, whether the first video block is allowed to be coded with a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), based on coded information associated with the first video block; and performing the conversion based on the determination.
  20. 20 . A non-transitory computer-readable recording medium storing a bitstream of a video which is generated by a method performed by an apparatus for video processing, wherein the method comprises: determining whether a first video block of the video is allowed to be coded with a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), based on coded information associated with the first video block; and generating the bitstream based on the determination.

Description

CROSS-REFERENCE This is a continuation of U.S. patent application Ser. No. 18/562,244 entitled “METHOD, DEVICE, AND MEDIUM FOR VIDEO PROCESSING” filed on Nov. 17, 2023, which is a National Stage Application based on International Patent Application No. PCT/CN2022/093994, filed May 19, 2022, which claims priority to International Patent Application No. PCT/CN2021/094729 filed with the China National Intellectual Property Administration (CNIPA) on May 19, 2021, the disclosures of which are incorporated herein by reference in their entireties. FIELD Embodiments of the present disclosure relates generally to video coding techniques, and more particularly, to intra prediction based on decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP). BACKGROUND Video coding standards have evolved primarily through the development of the well-known ITU-T and ISO/IEC standards. The ITU-T produced H.261 and H.263, ISO/IEC produced MPEG-1 and MPEG-4 Visual, and the two organizations jointly produced the H.262/MPEG-2 Video and H.264/MPEG-4 Advanced Video Coding (AVC) and H.265/HEVC standards. Since H.262, the video coding standards are based on the hybrid video coding structure wherein temporal prediction plus transform coding are utilized. To explore the future video coding technologies beyond HEVC, Joint Video Exploration Team (JVET) was founded by VCEG and MPEG jointly in 2015. Since then, many new methods have been adopted by JVET and put into the reference software named Joint Exploration Model (JEM). In April 2018, the Joint Video Expert Team (JVET) between VCEG (Q6/16) and ISO/IEC JTC1 SC29/WG11 (MPEG) was created to work on the VVC standard targeting at 50% bitrate reduction compared to HEVC. SUMMARY Embodiments of the present disclosure provide a solution for video processing. In a first aspect, a method for video processing is proposed. The method comprises: processing, during a conversion between a picture of a video and a bitstream of the video, a first video block in the picture based on a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), the DIMD being used for deriving at least one intra prediction mode (IPM); and performing the conversion based on the first video block. Compared with the conventional solution, in such a combined mode, which may be denoted as DIMD_ISP mode, the signaling overhead of intra prediction can be reduced, and the coding efficiency and performance are improved. In a second aspect, an apparatus for video processing, comprising a processor and a non-transitory memory coupled to the processor and having instructions stored thereon, wherein the instructions upon execution by the processor, cause the processor to perform a method in accordance with the first aspect of the present disclosure. In a third aspect, non-transitory computer-readable storage medium storing instructions that cause a processor to perform a method in accordance with the first aspect of the present disclosure. In a fourth aspect, a non-transitory computer-readable recording medium storing a bitstream of a video which is generated by a method performed by a video processing apparatus, wherein the method comprises: processing a first video block in a picture of the video based on a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), the DIMD being used for deriving at least one intra prediction mode (IPM); and generating the bitstream based on the first video block. In a fifth aspect, a method for storing bitstream of a video, comprising: processing a first video block in a picture of the video based on a combination of decoder-side intra prediction mode derivation (DIMD) and intra prediction with subpartitions (ISP), the DIMD being used for deriving at least one intra prediction mode (IPM): generating the bitstream based on the first video block; and storing the bitstream in a non-transitory computer-readable recording medium. This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS Through the following detailed description with reference to the accompanying drawings, the above and other objectives, features, and advantages of example embodiments of the present disclosure will become more apparent. In the example embodiments of the present disclosure, the same reference numerals usually refer to the same components. FIG. 1 illustrates a block diagram that illustrates an example video coding system, in accordance with some embodiments of the present disclosure; FIG. 2 illustrates a block diagram that illustrates a first example video encoder, in acco