US-20260129221-A1 - FRAME ALLOCATION OPTIMIZATION

US20260129221A1US 20260129221 A1US20260129221 A1US 20260129221A1US-20260129221-A1

Abstract

This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for optimizing storage space used for processing frames, for example encoding frames or decoding frames. A display processor may obtain an indication of a set of frames for processing. The display processor may identify a subset of the set of frames as a set of reference frames. The display processor may determine a set of reference timing windows (RTW) for a reference frame of the identified set of reference frames. The display processor may deallocate a set of memory addresses associated with the reference frame based on the determined set of RTW.

Inventors

Shengqi Yang

Assignees

QUALCOMM INCORPORATED

Dates

Publication Date: 20260507
Application Date: 20241105

Claims (20)

1 . An apparatus for display processing, comprising: a memory; and a processor coupled to the memory and, based at least in part on information stored in the memory, the processor is configured to: obtain an indication of a set of frames for processing; identify a subset of the set of frames as a set of reference frames; determine a set of reference timing windows (RTW) for a reference frame of the identified set of reference frames, wherein each RTW of the set of RTWs indicates a time window during which one or more frames of the set of frames refer to the reference frame; and deallocate a set of memory addresses associated with the reference frame based on the determined set of RTW.
2 . The apparatus of claim 1 , wherein the processor is further configured to: process the set of frames in response to the obtained indication of the set of frames for processing, wherein, to process the set of frames, the processor is configured to encode the set of frames; and output an indication of the encoded set of frames.
3 . The apparatus of claim 1 , wherein the processor is further configured to: process the set of frames in response to the obtained indication of the set of frames for processing, wherein, to process the set of frames, the processor is configured to decode the set of frames; and output an indication of the decoded set of frames.
4 . The apparatus of claim 1 , wherein the processor is further configured to: store the reference frame in the set of memory addresses based on the determined set of RTW.
5 . The apparatus of claim 1 , wherein the processor is further configured to: encode a subset of the set of frames during a last time window of the determined set of RTW, wherein, to deallocate the set of memory addresses associated with the reference frame based on the determined set of RTW, the processor is configured to: deallocate the set of memory addresses after the last time window of the determined set of RTW.
6 . The apparatus of claim 1 , wherein the processor is further configured to: refrain from allocating a second set of memory addresses to a second subset of the set of frames based on an identification of the second subset of the set of frames as a set of unreferenced frames.
7 . The apparatus of claim 1 , wherein, to determine the set of RTW for each reference frame of the identified set of reference frames, the processor is configured to: determine a first set of contiguous RTW and a second set of contiguous RTW associated with the reference frame, wherein the second set of contiguous RTW is after the first set of contiguous RTW, wherein a time gap exists between the first set of contiguous RTW and the second set of contiguous RTW, wherein the set of memory addresses are associated with a first memory storage device, wherein the processor is further configured to: process a subset of the set of frames during the first set of contiguous RTW; and store the reference frame in a second set of memory addresses associated with a second memory storage device different from the first memory storage device in response to the time gap being less than a threshold time period, wherein, to deallocate the set of memory addresses associated with the reference frame based on the determined set of RTW, the processor is configured to: deallocate the set of memory addresses after a last frame of the first set of contiguous RTW.
8 . The apparatus of claim 7 , wherein the first memory storage device comprises double data rate (DDR) memory and the second memory storage device comprises a hard disk memory.
9 . The apparatus of claim 7 , wherein the processor is further configured to: read the reference frame from the second set of memory addresses associated with the second memory storage device; store the reference frame in a third set of memory addresses associated with the first memory storage device based on the second set of contiguous RTW; process a second subset of the set of frames during the second set of contiguous RTW; and deallocate the third set of memory addresses based on the second set of contiguous RTW.
10 . The apparatus of claim 9 , wherein the processor is further configured to: deallocate the second set of memory addresses associated with the reference frame based on the determined set of RTW.
11 . The apparatus of claim 9 , wherein the processor is further configured to: determine a first time period for storing the reference frame in the second set of memory addresses associated with the second memory storage device; determine a second time period for storing the reference frame in the third set of memory addresses associated with the first memory storage device; and determine the threshold time period as a sum of the first time period and the second time period.
12 . The apparatus of claim 1 , wherein the processor is further configured to: decode a second set of frames; and identify a second subset of the second set of frames as a second set of reference frames, wherein, to determine the set of RTW for the reference frame of the identified set of reference frames, the processor is configured to: determine a second set of RTW for a second reference frame of the identified second set of reference frames; correlate the second reference frame of the identified second set of reference frames with the reference frame of the identified set of reference frames; and determine the set of RTW based on the correlated second reference frame and the determined second set of RTW.
13 . The apparatus of claim 12 , wherein the processor is further configured to: deallocate a set of preallocated memory addresses associated with a third subset of the set of frames based on an identification of the third subset of the set of frames as a set of unreferenced frames.
14 . The apparatus of claim 1 , wherein the processor is further configured to: decode a second set of frames; identify a second subset of the second set of frames as a second set of reference frames; decode a third set of frames; and identify a third subset of the third set of frames as a third set of reference frames, wherein, to determine the set of RTW for the reference frame of the identified set of reference frames, the processor is configured to: determine a second set of RTW for a second reference frame of the identified second set of reference frames; determine a third set of RTW for a third reference frame of the identified third set of reference frames; identify a correlation between the second reference frame of the identified second set of reference frames and the reference frame of the identified set of reference frames or between the third reference frame of the identified third set of reference frames and the reference frame of the identified set of reference frames; and determine the set of RTW based on (a) the correlated second reference frame and the determined second set of RTW or (b) the correlated third reference frame and the determined third set of RTW.
15 . The apparatus of claim 1 , wherein the apparatus comprises a wireless communication device.
16 . A method of display processing, comprising: obtaining an indication of a set of frames for processing; identifying a subset of the set of frames as a set of reference frames; determining a set of reference timing windows (RTW) for a reference frame of the identified set of reference frames, wherein each RTW of the set of RTWs indicates a time window during which one or more frames of the set of frames refer to the reference frame; and deallocating a set of memory addresses associated with the reference frame based on the determined set of RTW.
17 . The method of claim 16 , further comprising: refraining from allocating a second set of memory addresses to a second subset of the set of frames based on an identification of the second subset of the set of frames as a set of unreferenced frames.
18 . The method of claim 16 , wherein determining the set of RTW for each reference frame of the identified set of reference frames comprises: determining a first set of contiguous RTW and a second set of contiguous RTW associated with the reference frame, wherein the second set of contiguous RTW is after the first set of contiguous RTW, wherein a time gap exists between the first set of contiguous RTW and the second set of contiguous RTW, wherein the set of memory addresses are associated with a first memory storage device, further comprising: processing a subset of the set of frames during the first set of contiguous RTW; and storing the reference frame in a second set of memory addresses associated with a second memory storage device different from the first memory storage device in response to the time gap being less than a threshold time period, wherein deallocating the set of memory addresses associated with the reference frame based on the determined set of RTW comprises: deallocating the set of memory addresses after a last frame of the first set of contiguous RTW.
19 . The method of claim 16 , further comprising: decoding a second set of frames; and identifying a second subset of the second set of frames as a second set of reference frames, wherein determining the set of RTW for the reference frame of the identified set of reference frames comprises: determining a second set of RTW for a second reference frame of the identified second set of reference frames; correlating the second reference frame of the identified second set of reference frames with the reference frame of the identified set of reference frames; and determining the set of RTW based on the correlated second reference frame and the determined second set of RTW.
20 . A computer-readable medium storing computer executable code, the code when executed by a processor, causes the processor to: obtain an indication of a set of frames for processing; identify a subset of the set of frames as a set of reference frames; determine a set of reference timing windows (RTW) for a reference frame of the identified set of reference frames, wherein each RTW of the set of RTWs indicates a time window during which one or more frames of the set of frames refer to the reference frame; and deallocate a set of memory addresses associated with the reference frame based on the determined set of RTW.

Description

TECHNICAL FIELD The present disclosure relates generally to processing systems, and more particularly, to one or more techniques for display processing. INTRODUCTION Computing devices often perform graphics and/or display processing (e.g., utilizing a graphics processing unit (GPU), a central processing unit (CPU), a display processor, etc.) to render and display visual content. Such computing devices may include, for example, computer workstations, mobile phones such as smartphones, embedded systems, personal computers, tablet computers, and video game consoles. GPUs are configured to execute a graphics processing pipeline that includes one or more processing stages, which operate together to execute graphics processing commands and output a frame. A central processing unit (CPU) may control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern day CPUs are typically capable of executing multiple applications concurrently, each of which may need to utilize the GPU during execution. A display processor may be configured to convert digital information received from a CPU to analog values and may issue commands to a display panel for displaying the visual content. A device that provides content for visual presentation on a display may utilize a CPU, a GPU, and/or a display processor. Current techniques may not address overutilization of rapid memory while processing frames, for example while encoding or decoding frames. There is a need for frame buffer maintenance techniques. BRIEF SUMMARY The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later. In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may include a memory; and at least one processor coupled to the memory and, based at least in part on information stored in the memory, the at least one processor may be configured to obtain an indication of a set of frames for processing. For example, the at least one processor may encode the set of frames or may decode the set of frames. The at least one processor may identify a subset of the set of frames as a set of reference frames. The at least one processor may determine a set of reference timing windows (RTW) for a reference frame of the identified set of reference frames. The at least one processor may deallocate a set of memory addresses associated with the reference frame based on the determined set of RTW. In some aspects, the techniques described herein relate to a method of display processing, including: obtaining an indication of a set of frames for processing; identifying a subset of the set of frames as a set of reference frames; determining a set of reference timing windows (RTW) for a reference frame of the identified set of reference frames; and deallocating a set of memory addresses associated with the reference frame based on the determined set of RTW. In some aspects, the techniques described herein relate to a method, further including: processing the set of frames in response to the obtained indication of the set of frames for processing, where processing the set of frames includes encoding the set of frames; and outputting an indication of the encoded set of frames. In some aspects, the techniques described herein relate to a method, further including: processing the set of frames in response to the obtained indication of the set of frames for processing, where processing the set of frames includes decoding the set of frames; and outputting an indication of the decoded set of frames. In some aspects, the techniques described herein relate to a method, further including: storing the reference frame in the set of memory addresses based on the determined set of RTW. In some aspects, the techniques described herein relate to a method, further including: encoding a subset of the set of frames during a last time window of the determined set of RTW, where deallocating the set of memory addresses associated with the reference frame based on the determined set of RTW includes: deallocating the set of memory addresses after the last time window of the determined set of RTW. In some aspects, the techniques described herein relate to a method, further including: refraining from allocating a second set of memory addresses to a second subset of the set of frames based on an identification of the second subset of the set of frames as a set of unreferenced frames. In some aspects, the techniques described herein relate to a method, where determining the set of RTW for each reference frame o