US-20260129756-A1 - PRINTED CIRCUIT BOARD

US20260129756A1US 20260129756 A1US20260129756 A1US 20260129756A1US-20260129756-A1

Abstract

A printed circuit board includes a glass layer having a first surface and a second surface opposing each other in a first direction, a through-via passing through at least a portion of a space between the first and second surfaces of the glass layer, a first pad embedded in the first surface of the glass layer, the first pad connected to one end of the through-via in the first direction, and a second pad protruding from the second surface of the glass layer, the second pad connected to the other end of the through-via in the first direction. The first and second pads have different structures and/or arrangements.

Inventors

Song I Kim

Assignees

SAMSUNG ELECTRO-MECHANICS CO., LTD.

Dates

Publication Date: 20260507
Application Date: 20250409
Priority Date: 20241104

Claims (19)

1 . A printed circuit board comprising: a glass layer having a first surface and a second surface opposing each other in a first direction; a through-via passing through at least a portion of a space between the first and second surfaces of the glass layer, the through-via having a first end and a second end opposing the first end in the first direction; a first pad embedded in the first surface of the glass layer, the first pad connected to the first end of the through-via; and a second pad protruding from the second surface of the glass layer, the second pad connected to the second end of the through-via.
2 . The printed circuit board of claim 1 , wherein each of a first surface and a second surface of the first pad has a substantially rounded shape.
3 . The printed circuit board of claim 2 , wherein each of a first surface and a second surface of the second pad has a substantially flat shape.
4 . The printed circuit board of claim 1 , wherein the first end of the through-via has a step portion with respect to the first surface of the glass layer.
5 . The printed circuit board of claim 4 , wherein the second end of the through-via is substantially coplanar with the second surface of the glass layer.
6 . The printed circuit board of claim 1 , wherein the first pad includes a first seed layer that is disposed between the first end of the through-via and the second surface of the first pad, and the second pad includes a second seed layer that is disposed between the second end of the through-via and the second surface of the second pad.
7 . The printed circuit board of claim 1 , further comprising: a first insulating body disposed on the first surface of the glass layer; and a second insulating body disposed on the second surface of the glass layer, wherein the first insulating body is thicker than the second insulating body in the first direction.
8 . The printed circuit board of claim 7 , further comprising: a plurality of first wiring layers respectively disposed on or in the first insulating body; and a second wiring layer disposed on or in the second insulating body, wherein the plurality of first wiring layers has more layers than the second wiring layer.
9 . The printed circuit board of claim 8 , comprising: a plurality of first via layers respectively disposed in the first insulating body, the plurality of first via layers respectively connected to one or more first wiring layers among the plurality of first wiring layers; and a second via layer disposed in the second insulating body, the second via layer connected to the second wiring layer, wherein the plurality of first via layers has more layers than the second via layer.
10 . The printed circuit board of claim 9 , wherein the glass layer has a cavity passing through at least a portion of the glass layer from the first surface of the glass layer in the first direction, the printed circuit board further comprises a first electronic component, the first electronic component is connected to the one or more of the plurality of first wiring layers through one or more of the plurality of first via layers, and at least a portion of the first electronic component is disposed in the cavity, and the first insulating body covers at least a portion of the first electronic component, and fills at least a portion of the cavity.
11 . The printed circuit board of claim 9 , further comprising: a first resist layer disposed on the first insulating body, the first resist layer covering at least a first portion of an outermost first wiring layer in the first direction among the plurality of first wiring layers, the first resist layer does not cover at least a second portion of the outermost first wiring layer in the first direction; a second resist layer disposed on the second insulating body, the second resist layer covering at least a first portion of the second wiring layer, the second resist layer does not cover at least a second portion of an outermost second wiring layer; a first electrical connection metal disposed on the first resist layer; a second electronic component disposed on the first resist layer, the second electronic component connected to the second portion of the outermost first wiring layer through the first electrical connection metal; and a second electrical connection metal disposed on the second resist layer, the second electrical connection metal connected to the second portion of the outermost second wiring layer.
12 . The printed circuit board of claim 1 , further comprising: a frame having a through-portion, wherein at least a portion of the glass layer is disposed in the through-portion, and a space between the frame and the glass layer includes a filler that fills the space.
13 . The printed circuit board of claim 12 , wherein the frame continuously surrounds the glass layer.
14 . The printed circuit board of claim 12 , wherein the through-portion has a continuous wall surface.
15 . The printed circuit board of claim 1 , wherein, in the first direction, the first end of the through-via is offset from the first surface of the glass layer.
16 . A printed circuit board comprising: a glass layer having a first surface and a second surface opposing each other in a first direction; a through-via passing through at least a portion of a space between the first and second surfaces of the glass layer, the through-via having a first end and a second end opposing the first end in the first direction; a first pad disposed on the first surface of the glass layer, the first pad connected to the first end of the through-via; and a second pad disposed on the second surface of the glass layer, the second pad connected to the second end of the through-via, wherein the first pad and the second pad are asymmetrical with respect to each other and with respect to a central line between the first surface and the second surface of the glass layer.
17 . The printed circuit board of claim 16 , wherein a distance between the first pad and the central line in the first direction is shorter than a distance between the second pad and the central line in the first direction.
18 . The printed circuit board of claim 16 , wherein a surface of the first pad, connected to the first end of the through-via, has a substantially rounded shape, and a surface of the second pad, connected to the second end of the through-via, has a substantially flat shape.
19 . The printed circuit board of claim 16 , wherein a first seed layer is disposed between the first pad and the through-via, and a second seed layer is disposed between the second pad and the through-via.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S) This application claims benefit of priority to Korean Patent Application No. 10-2024-0154403 filed on Nov. 4, 2024 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. TECHNICAL FIELD The present disclosure relates to a printed circuit board. An interposer, a type of intermediate substrate used in semiconductor packaging technology, may include a rewiring layer on a portion thereof generally connected to a chip for electrical connection between a chip and a substrate having a large pitch difference. Accordingly, upper and lower portions of the interposer may be asymmetrical with respect to each other. In this case, there may be a limitation in controlling occurrence of warpage. SUMMARY An aspect of the present disclosure provides a printed circuit board capable of easily controlling warpage even in an asymmetrical structure. A glass layer having a through-via may be used, and both pads of the through-via may have different arrangements and structures. According to an aspect of the present disclosure, there is provided a printed circuit board including a glass layer having a first surface and a second surface opposing each other in a first direction, a through-via passing through at least a portion of a space between the first and second surfaces of the glass layer, the through-via having a first end and a second end opposing the first end in the first direction, a first pad embedded in the first surface of the glass layer, the first pad connected to the first end of the through-via, and a second pad protruding from the second surface of the glass layer, the second pad connected to the second end of the through-via. According to another aspect of the present disclosure, there is provided a printed circuit board including a glass layer having a first surface and a second surface opposing each other in a first direction, a through-via passing through at least a portion of a space between the first and second surfaces of the glass layer, the through-via having a first end and a second end opposing the first end in the first direction, a first pad disposed on the first surface of the glass layer, the first pad connected to the first end of the through-via, and a second pad disposed on the second surface of the glass layer, the second pad connected to the second end of the through-via. The first pad and the second pad may be asymmetrical with respect to each other and with respect to a central line between the first surface and the second surface of the glass layer. According to example embodiments of the present disclosure, a printed circuit board may easily control warpage even in an asymmetrical structure. BRIEF DESCRIPTION OF DRAWINGS The above and other aspects, features, and advantages of the present disclosure will be more clearly understood from the following detailed description, taken in conjunction with the accompanying drawings, in which: FIG. 1 is a schematic block diagram of an example of an electronic device system; FIG. 2 is a schematic cross-sectional view of an example of a printed circuit board; FIG. 3 is a schematic process cross-sectional view of an example of manufacturing a through-via and first and second pads included in the printed circuit board of FIG. 2; FIG. 4 is a schematic process cross-sectional view of an example of operation B of FIG. 3; FIG. 5 is a schematic process cross-sectional view of another example of operation B of FIG. 3; and FIG. 6 is a schematic cross-sectional view of another example of a printed circuit board. DETAILED DESCRIPTION Hereinafter, example embodiments of the present disclosure are described with reference to the accompanying drawings. The shapes and sizes of components in the drawings may be exaggerated or reduced for clearer description. FIG. 1 is a schematic block diagram of an example of an electronic device system. Referring to the drawings, an electronic device 1000 may accommodate a mainboard 1010. The mainboard 1010 may include chip-related components 1020, network-related components 1030, and other components 1040, physically or electrically connected thereto. Such components may be connected to other components to be described below to form various signal lines 1090. The chip-related components 1020 may include a memory chip such as a volatile memory (for example, a dynamic random access memory (DRAM)), a non-volatile memory (for example, a read only memory (ROM)), or a flash memory, an application processor chip such as a central processor (for example, a central processing unit (CPU)), a graphics processor (for example, a graphics processing unit (GPU)), a digital signal processor, a cryptographic processor, a microprocessor, or a microcontroller, and a logic chip such as an analog-to-digital converter or an application-specific integrated circuit (ASIC). However, the chip-related components 1020 are not limited thereto, and may includ