US-20260129762-A1 - WIRING SUBSTRATE

US20260129762A1US 20260129762 A1US20260129762 A1US 20260129762A1US-20260129762-A1

Abstract

A wiring substrate includes a first resin insulating layer having a cavity, a second resin insulating layer formed on the first insulating layer, a component accommodated in the cavity of the first insulating layer and including an electrode facing the second insulating layer, and a third resin insulating layer formed on the first insulating layer. The second insulating layer closes first-surface-side opening of the cavity in the first insulating layer and is closer to a mounting surface of an electronic component than the third insulating layer, the third insulating layer closes second-surface-side opening of the cavity in the first insulating layer and includes a part filling a gap formed between an inner wall of the cavity and the component in the cavity, and the cavity has a trapezoidal cross-sectional shape having a distance between opposing legs decreasing from the second surface toward the first surface of the first insulating layer.

Inventors

Toshihide MAKINO
Nobuhisa Kuroda

Assignees

IBIDEN CO., LTD.

Dates

Publication Date: 20260507
Application Date: 20251014
Priority Date: 20241106

Claims (20)

1 . A wiring substrate, comprising: a first resin insulating layer having a cavity; a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer faces a first surface of the first resin insulating layer; a component accommodated in the cavity of the first resin insulating layer and comprising an electrode facing the second resin insulating layer; and a third resin insulating layer formed on the first resin insulating layer such that the third resin insulating layer faces a second surface of the first resin insulating layer on an opposite side with respect to the first surface of the first resin insulating layer, wherein the second resin insulating layer is formed on the first resin insulating layer such that the second resin insulating layer closes a first-surface-side opening of the cavity formed in the first resin insulating layer and is closer to a mounting surface of an electronic component than the third resin insulating layer, the third resin insulating layer is formed on the first resin insulating layer such that the third resin insulating layer closes a second-surface-side opening of the cavity formed in the first resin insulating layer and includes a part filling a gap formed between an inner wall of the cavity and the component in the cavity, and the first resin insulating layer is formed such that the cavity has a trapezoidal cross-sectional shape having a distance between opposing legs decreasing from the second surface of the first resin insulating layer toward the first surface of the first resin insulating layer.
2 . The wiring substrate according to claim 1 , wherein the first resin insulating layer includes a plurality of resin insulating layers comprising an uppermost first resin insulating layer in contact with the second resin insulating layer and a lowermost first resin insulating layer in contact with the third resin insulating layer.
3 . The wiring substrate according to claim 1 , wherein the second resin insulating layer is forming an outermost resin insulating layer.
4 . The wiring substrate according to claim 3 , wherein the outermost resin insulating layer is a first solder resist layer.
5 . The wiring substrate according to claim 1 , further comprising: an outermost resin insulating layer formed on the second resin insulating layer such that the outermost resin insulating layer is in contact with the second resin insulating layer.
6 . The wiring substrate according to claim 5 , wherein the outermost resin insulating layer is a first solder resist layer.
7 . The wiring substrate according to claim 1 , further comprising: an adhesive film formed between the second resin insulating layer and the electrode of the component, and a via conductor formed to penetrate through the second resin insulating layer and the adhesive film such that the via conductor reaches the electrode of the component.
8 . The wiring substrate according to claim 2 , further comprising: a second via conductor formed to penetrate through the third resin insulating layer and the lowermost first resin insulating layer.
9 . The wiring substrate according to claim 1 , further comprising: an adhesive film formed between the second resin insulating layer and the electrode of the component such that the adhesive film fixes the component to the second resin insulating layer.
10 . The wiring substrate according to claim 2 , wherein the first resin insulating layer is formed such that the plurality of resin insulating layers is consisting of the uppermost first resin insulating layer and the lowermost first resin insulating layer.
11 . The wiring substrate according to claim 8 , wherein the second via conductor penetrates only the third resin insulating layer and the lowermost first resin insulating layer.
12 . The wiring substrate according to claim 6 , further comprising: a second solder resist layer formed at a position farthest from the first solder resist layer; and a fourth resin insulating layer comprising a reinforcing material and formed in contact with the second solder resist layer and on an inner side of the second solder resist layer, wherein the first resin insulating layer, the second resin insulating layer, and the third resin insulating layer do not contain a reinforcing material.
13 . The wiring substrate according to claim 12 , wherein the first solder resist layer and the second solder resist layer do not contain a reinforcing material, and the fourth resin insulating layer has a thickness that is greater than a thickness of the first resin insulating layer.
14 . The wiring substrate according to claim 4 , further comprising: a second solder resist layer formed at a position farthest from the first solder resist layer; and a fourth resin insulating layer comprising a reinforcing material and formed in contact with the second solder resist layer and on an inner side of the second solder resist layer, wherein the first resin insulating layer and the third resin insulating layer do not contain a reinforcing material.
15 . The wiring substrate according to claim 1 , wherein the second resin insulating layer has an alignment mark formed on a surface on an opposite side with respect to a surface facing the first surface of the first resin insulating layer.
16 . The wiring substrate according to claim 2 , wherein the second resin insulating layer is forming an outermost resin insulating layer.
17 . The wiring substrate according to claim 16 , wherein the outermost resin insulating layer is a first solder resist layer.
18 . A method for manufacturing a wiring substrate, comprising: forming a metal layer on a support plate; forming a first alignment mark on the metal layer; laminating a second resin insulating layer on the metal layer such that the second resin insulating layer covers the first alignment mark; forming a first conductor layer on the second resin insulating layer; forming an uppermost first resin insulating layer on the second resin insulating layer such that the uppermost first resin insulating layer covers the first conductor layer; forming a second conductor layer on the uppermost first resin insulating layer; forming a lowermost first resin insulating layer on the uppermost first resin insulating layer such that the lowermost first resin insulating layer covers the conductor layer; forming a cavity in the uppermost first resin insulating layer and the lowermost first resin insulating layer such that the cavity penetrates through the uppermost first resin insulating layer and the lowermost first resin insulating layer; accommodating a component in the cavity formed in the uppermost first resin insulating layer and the lowermost first resin insulating layer such that the component is positioned relative to the first alignment mark; forming a third resin insulating layer on the lowermost first resin insulating layer; forming a third conductor layer on the third resin insulating layer; removing the support plate and the metal layer from the second resin insulating layer; and forming an opening in the second resin insulating layer at a position relative to the first alignment mark such that the opening penetrates through the second resin insulating layer and exposes an electrode of the component.
19 . The method for manufacturing a wiring substrate according to claim 18 , further comprising: forming an opening in the third resin insulating layer and the lowermost first resin insulating layer such that the opening penetrates through the third resin insulating layer and the lowermost first resin insulating layer and reaches the second conductor layer; and forming a via conductor in the opening formed in the third resin insulating layer and the lowermost first resin insulating layer such that the via conductor connects the second conductor layer and the third conductor layer.
20 . The method for manufacturing a wiring substrate according to claim 18 , further comprising: forming a second via conductor the opening formed in the second resin insulating layer such that the second via conductor fills the opening formed in the second resin insulating layer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS The present application is based upon and claims the benefit of priority to Japanese Patent Application No. 2024-194548, filed Nov. 6, 2024, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a wiring substrate. Description of Background Art Japanese Patent Application Laid-Open Publication No. 2015-106610 describes an electronic component-embedded substrate in which an electronic component is embedded in a cavity formed in a resin insulating layer. The entire contents of this publication are incorporated herein by reference. SUMMARY OF THE INVENTION According to one aspect of the present invention, a wiring substrate includes a first resin insulating layer having a cavity, a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer faces a first surface of the first resin insulating layer, a component accommodated in the cavity of the first resin insulating layer and including an electrode facing the second resin insulating layer, and a third resin insulating layer formed on the first resin insulating layer such that the third resin insulating layer faces a second surface of the first resin insulating layer on the opposite side with respect to the first surface of the first resin insulating layer. The second resin insulating layer is formed on the first resin insulating layer such that the second resin insulating layer closes a first-surface-side opening of the cavity formed in the first resin insulating layer and is closer to a mounting surface of an electronic component than the third resin insulating layer, the third resin insulating layer is formed on the first resin insulating layer such that the third resin insulating layer closes a second-surface-side opening of the cavity formed in the first resin insulating layer and includes a part filling a gap formed between an inner wall of the cavity and the component in the cavity, and the first resin insulating layer is formed such that the cavity has a trapezoidal cross-sectional shape having a distance between opposing legs decreasing from the second surface of the first resin insulating layer toward the first surface of the first resin insulating layer. According to another aspect of the present invention, a method for manufacturing a wiring substrate includes forming a metal layer on a support plate, forming a first alignment mark on the metal layer, laminating a second resin insulating layer on the metal layer such that the second resin insulating layer covers the first alignment mark, forming a first conductor layer on the second resin insulating layer, forming an uppermost first resin insulating layer on the second resin insulating layer such that the uppermost first resin insulating layer covers the first conductor layer, forming a second conductor layer on the uppermost first resin insulating layer, forming a lowermost first resin insulating layer on the uppermost first resin insulating layer such that the lowermost first resin insulating layer covers the conductor layer, forming a cavity in the uppermost first resin insulating layer and the lowermost first resin insulating layer such that the cavity penetrates through the uppermost first resin insulating layer and the lowermost first resin insulating layer, accommodating a component in the cavity formed in the uppermost first resin insulating layer and the lowermost first resin insulating layer such that the component is positioned relative to the first alignment mark, forming a third resin insulating layer on the lowermost first resin insulating layer, forming a third conductor layer on the third resin insulating layer, removing the support plate and the metal layer from the second resin insulating layer, and forming an opening in the second resin insulating layer at a position relative to the first alignment mark such that the opening penetrates through the second resin insulating layer and exposes an electrode of the component. BRIEF DESCRIPTION OF THE DRAWINGS A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein: FIG. 1 is a cross-sectional view schematically illustrating a wiring substrate according to an embodiment of the present invention; FIG. 2A is a cross-sectional view schematically illustrating a method for manufacturing a wiring substrate according to an embodiment of the present invention; FIG. 2B is a cross-sectional view schematically illustrating a method for manufacturing a wiring substrate according to an embodiment of the present invention; FIG. 2C is a cross-sectional view schematically illustrating a method for manufacturing a wiring substrate according to an emb