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US-20260129770-A1 - SPRAY PYROLYSIS DEPOSITION OF DIELECTRIC LINERS FOR TGV

US20260129770A1US 20260129770 A1US20260129770 A1US 20260129770A1US-20260129770-A1

Abstract

According to the various aspects, a method is disclosed that includes providing a substrate with a plurality of through hole vias disposed in the substrate and each through hole via having an interior sidewall. The substrate may be disposed on a support in a spray pyrolysis tool. In an aspect, the substrate may be preheated and a precursor solution may be dispensed towards the sidewalls of the plurality of through hole vias. The heating of the precursor solution results in the forming of a dielectric liner on the sidewalls. In another aspect, a device having a glass core with a plurality of through hole vias that form sidewalls disposed in the substrate, a dielectric liner having a grain size in a range of approximately 20 nm to 500 nm, and a conductive material filling the plurality of through hole vias.

Inventors

  • Sriram Dattaguru

Assignees

  • INTEL CORPORATION

Dates

Publication Date
20260507
Application Date
20241107

Claims (20)

  1. 1 . A method comprising: providing a substrate with a plurality of through hole vias disposed in the substrate, wherein each through hole via comprises a sidewall; disposing the substrate on a support in a coating tool; preheating the substrate using a heating element in the support; dispensing a precursor solution towards the sidewalls of the plurality of through hole vias; and forming a dielectric liner on the sidewalls.
  2. 2 . The method of claim 1 , wherein the coating tool comprises a spray pyrolysis tool.
  3. 3 . The method of claim 1 , wherein the dispensing of the precursor solution further comprises providing droplets having a size in a range of approximately 2 μm to over 50 μm.
  4. 4 . The method of claim 3 , further comprises using an aerosol sprayer to dispense the precursor solution.
  5. 5 . The method of claim 3 , further comprises using an ultrasonic sprayer to dispense the precursor solution.
  6. 6 . The method of claim 1 , further comprises heating the dispensed precursor solution to a temperature range of approximately 200 to 400° C.
  7. 7 . The method of claim 6 , further comprises removing impurities during the heating of the dispensed precursor solution.
  8. 8 . The method of claim 6 , wherein the support is preheated to a temperature range of approximately 300 to 500° C.
  9. 9 . The method of claim 1 , wherein the substrate having the plurality of through hole vias comprises a topside surface and a backside surface, and wherein the method further comprises dispensing the precursor solution towards the topside surface of the substrate to form the dielectric liner, turning over the substrate, and dispensing the precursor solution towards the backside surface of the substrate to form the dielectric liner.
  10. 10 . The method of claim 1 , wherein the support further comprises a vacuum feature and wherein the method further comprises using the vacuum feature to apply a vacuum on the plurality of through hole vias while dispensing the precursor solution towards the sidewalls of the plurality of through hole vias.
  11. 11 . A product made by a process comprising: providing a substrate with a plurality of through hole vias disposed in the substrate, wherein each through hole via comprises a sidewall; disposing the substrate on a support of a spray pyrolysis tool; preheating the substrate using a heating element in the support; dispensing a precursor solution towards the sidewalls of the plurality of through hole vias using the spray pyrolysis tool; and forming a dielectric liner on the sidewalls.
  12. 12 . The product of claim 11 , wherein the dielectric liner has a grain size in a range of approximately 20 nm to 500 nm.
  13. 13 . The product of claim 11 , wherein the dielectric liner has a thickness in a range of approximately 0.1 μm to 2 μm.
  14. 14 . The product of claim 11 , wherein the precursor solution comprises a metal salt.
  15. 15 . The product of claim 11 , wherein the process further comprises heating the dispensed precursor solution to a temperature range of approximately 200 to 400° C.
  16. 16 . The product of claim 15 , wherein the process further comprises removing impurities during the heating of the dispensed precursor solution.
  17. 17 . The product of claim 11 , wherein the process of dispensing the precursor solution further comprises providing droplets having a size in a range of approximately 2 μm to over 50 μm.
  18. 18 . A device comprising: a glass core comprising a plurality of through hole vias disposed in the glass core, wherein each through hole via comprises a sidewall; a dielectric liner having a grain size in a range of approximately 20 nm to 500 nm on the sidewall; and a conductive material filling the plurality of through hole vias.
  19. 19 . The device of claim 18 , wherein the dielectric liner has a thickness in a range of approximately 0.1 μm to 2 μm.
  20. 20 . The device of claim 18 , wherein the dielectric liner is substantially free of impurities.

Description

BACKGROUND As semiconductor technology advances, the need to improve performance and lower costs for integrated circuit design and fabrication are constant challenges. It is becoming more difficult and costly to realize high-volume manufacturing for semiconductors as transistors continue to shrink in size. Cost savings may be potentially realized by building more efficient structures and using materials that improve power performance. In terms of dimensional and performance stability, silicon and glass are better suited for fine-pitch interconnects with high input/output (I/O) density than organic substrates. However, as a semiconductor interconnect structure, silicon and glass substrates may require the deposition of dielectric layers, which raises production costs. On the other hand, as an insulating material, glass has become an attractive support material for advanced manufacturing and packaging due to its adjustable coefficient of thermal expansion (CTE), excellent surface flatness, high resistivity, and low cost. Therefore, glass has emerged as the material of choice in recent years for a new generation of semiconductor devices. It is common to use through-glass-vias (TGVs) and microvias as the interconnects between layers in high-density interconnect substrates and printed circuit boards (PCBs) to accommodate the high I/O density of advanced packages. The use of three-dimensional (3D) interconnects with TGV technology has wide applicability in radio frequency (RF) devices, optoelectronic systems, and multi-layer glass substrates. It is customary to have a metal oxide (i.e., dielectric) adhesion promotion layer on the through hole vias and glass surface that allows for electroless copper (Cu) to be plated directly on the glass as a seed layer, followed by a thicker electrolytic copper to be plated on top. However, the costs of the equipment for producing such insulative liners, such as sputtering or atomic layer deposition tools, are high and their throughput times are relatively slow. It is therefore important to have solutions that are able to improve the mechanical performance/stability of the through hole vias and reduce the cost of manufacture. BRIEF DESCRIPTION OF THE DRAWINGS In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the present disclosure. The dimensions of the various features or elements may be arbitrarily expanded or reduced for clarity. In the following description, various aspects of the present disclosure are described with reference to the following drawings, in which: FIG. 1 shows an exemplary representation of through hole vias having insulative coatings/linings according to an aspect of the present disclosure; FIG. 2 shows exemplary representations of a present coating tool for producing the insulative coatings/linings for the through hole vias according to an aspect of the present disclosure; FIG. 3 shows a simplified flow diagram for an exemplary method according to an aspect of the present disclosure; and FIG. 4 shows an exemplary representation of through hole vias having a metal filling to form a plurality of interconnects. DETAILED DESCRIPTION The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details, and aspects in which the present disclosure may be practiced. These aspects are described in sufficient detail to enable those skilled in the art to practice the present disclosure. Various aspects are provided for devices, and various aspects are provided for methods. It will be understood that the basic properties of the devices also hold for the methods and vice versa. Other aspects may be utilized and structural, and logical changes may be made without departing from the scope of the present disclosure. The various aspects are not necessarily mutually exclusive, as some aspects can be combined with one or more other aspects to form new aspects. According to the present disclosure, a present device having a coating or liner of insulative/dielectric material may be produced by a low-cost spray pyrolysis tool and method. The present spray pyrolysis method is adapted for use with glass cores and glass substrates. In an aspect, the spray pyrolysis method may be a cost-effective, reproducible method, and able to coat complex geometries. In addition, the present method may be easily integrated into standard substrate/glass core process flows for high-volume manufacturing. The present disclosure is directed to a method that includes providing a substrate with a plurality of through hole vias disposed in the substrate and each through hole via having an interior sidewall. The substrate may be disposed on a support in a coating tool, i.e., a spray pyrolysis tool. In an aspect, the substrate may be preheated using a heating element in the su