US-20260129808-A1 - DUAL PURPOSE COOLING IN COMPUTER MODULES

Abstract

Systems and methods herein are for dual purpose cooling for a computer module that may include a device cooling loop which may be configured to cool computing features of the computer module. The systems and methods herein may include an interconnect cooling loop, provided together with the device cooling loop, where the interconnect cooling loop may be configured to reduce, by at least a predetermined threshold, electrical resistance of interconnect features of the computer module.

Inventors

• John Franz
• Tahir Cader
• Elad Mentovich
• Yuri Berk
• Isabelle Cestier

Assignees

• NVIDIA CORPORATION

Dates

Publication Date

20260507

Application Date

20241106

Claims (20)

1. 1 . A system, comprising: a device cooling loop configured to cool computing features of a computer module; and an interconnect cooling loop configured to reduce, by at least a predetermined threshold, electrical resistance and/or electrical loss of interconnect features of the computer module.
2. 2 . The system of claim 1 , wherein the device cooling loop is associated with one or more cold plates for one or more of a central processing unit (CPU) or a graphics processing unit (GPU), and wherein the interconnect cooling loop is associated with a thermally conductive line for the interconnect features associated with the CPU or the GPU or that is between the CPU and the GPU.
3. 3 . The system of claim 1 , wherein each of the device cooling loop and the interconnect cooling loop define a fluid path having different device media.
4. 4 . The system of claim 1 , wherein each of the device cooling loop and the interconnect cooling loop operate at different temperatures, pressures, and flow rates.
5. 5 . The system of claim 1 , wherein the device cooling loop is associated with a device media having a device exit temperature and wherein the interconnect cooling loop is associated with an interconnect media having an interconnect exit temperature, wherein a difference between the device exit temperature and the interconnect exit temperature is at least 100° C.
6. 6 . The system of claim 5 , wherein the device cooling loop is associated with a device media having an exit temperature of above 0 degrees centigrade (° C.) and wherein the interconnect cooling loop is associated with an interconnect media having an exit temperature of less than −100° C.
7. 7 . The system of claim 6 , wherein the device media and the interconnect media are a same media used serially or subsequently and undergo a two-phase transformation process.
8. 8 . The system of claim 1 , wherein the device cooling loop is associated with a device media having an inlet temperate of less than 0° C. and above −100° C. and wherein the interconnect cooling loop is associated with an interconnect media having an inlet temperature of less than −100° C.
9. 9 . The system of claim 1 , wherein the interconnect cooling loop is configured in a series configuration with respect to the device cooling loop, wherein the series configuration enables heat exchange between the device cooling loop and the interconnect cooling loop, and wherein an interconnect media used in the interconnect cooling loop is in a first state to perform the reduction in the electrical resistance of the interconnect features and is in a second state or undergoes a phase change from the first state to the second state to perform the heat exchange with the device cooling loop.
10. 10 . The system of claim 1 , further comprising: one or more cold plates in the device cooling loop and associated with at least one of the computing features to absorb heat from the at least one of the computing features; and one or more metal lines in the interconnect cooling loop to align with the interconnect features and to enable the reduction, by at least the predetermined threshold, of the electrical resistance of the interconnect features.
11. 11 . The system of claim 1 , further comprising: a pump or directional valves to support a single phase or a two-phase media in the interconnect cooling loop, wherein the pump or the direction valves are controlled based in part on an input from a control system associated with the interconnect cooling loop.
12. 12 . The system of claim 1 , further comprising: a circuit board comprising the interconnect features on a first side and on a second side of the circuit board; a top side stiffener plate over the first side of the circuit board; and a bottom side stiffener plate under the second side of the circuit board, wherein the interconnect cooling loop is provided using media paths for the top side stiffener plate and for the bottom side stiffener plate.
13. 13 . The system of claim 12 , wherein the media paths extend from a single media path within the computer module to reduce, by at least the predetermined threshold, the electrical resistance of first one of the interconnect features on the first side of the circuit board and of second one of the interconnect features on the second side of the circuit board.
14. 14 . A system comprising: one or more circuits to receive first information associated with computing features and interconnect features of a computer module and to provide second information for media paths associated with a device cooling loop and an interconnect cooling loop within the computer module; and a manufacturing sub-system to prepare, using the second information, one or more stiffener plates to be associated with a circuit board having the computing features and the interconnect features, to prepare the device cooling loop to cool one or more of the computing features using at least a cold plate, and to prepare the interconnect cooling loop to reduce, by at least a predetermined threshold, electrical resistance of interconnect features of the computer module.
15. 15 . The system of claim 14 , wherein the first information comprises one or more of a first layout of the computing features and the interconnect features, a type of the computing features and the interconnect features, or predetermined heat or electrical specifications associated with the computing features and with the interconnect features, and wherein the second information comprises one or more of a second layout for the media paths comprising at least the interconnect cooling loop, a flow rate for at least an interconnect media of the interconnect cooling loop, or a predetermined phase or temperature range for the interconnect media.
16. 16 . The system of claim 14 , wherein the one or more circuits is further to provide the predetermined threshold for reduction in the electrical resistance of at least one of the interconnect features based in part on the first information and is further to determine one or more of a flow rate and one or more inlet and exit temperatures to be associated with interconnect cooling loop.
17. 17 . The system of claim 14 , wherein the one or more circuits is further to receive the predetermined threshold for reduction in the electrical resistance of the at least one of the interconnect features based in part on the first information indicating that the at least one of the interconnect features is a high-speed interface between one or more of the computing features of the computer module.
18. 18 . A method, comprising: cooling, using a device cooling loop, computing features of a computer module; and reducing, by at least a predetermined threshold and using an interconnect cooling loop, electrical resistance and/or electrical loss of interconnect features of the computer module.
19. 19 . The method of claim 18 , wherein the device cooling loop is associated with a secondary media having an exit temperature of above 0 degrees centigrade (° C.) and wherein the interconnect cooling loop is associated with an interconnect media having an exit temperature of less than −100° C.
20. 20 . The method of claim 18 , wherein the device cooling loop is associated with a secondary media having an inlet temperate of less than 0° C. and above −100° C. and wherein the interconnect cooling loop is associated with an interconnect media having an inlet temperature of less than −100° C.

Description

TECHNICAL FIELD At least one embodiment pertains to cooling in computer environments such as datacenters. BACKGROUND Computer environments such as datacenters may be subject to liquid cooling. A method of liquid cooling may include use of a single-phase treated water or propylene glycol mixture as media to cool computing features within a computer module. The focus may be on high-power density components such as processors and other computing circuitry, including graphics processing units (GPUs), central processing units (CPUs), data processing units (DPUs), memory, switches, and power regulators. The media used to cool such components may be limited by a freeze point in combination with a risk of condensation. Such cooling may not address interconnect features used with the processors and the other computing circuitry, and may not be able to address interconnect features to enable a predetermined data transmission rate. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is an illustration of a system subject to dual purpose cooling that includes cooling for interconnects, in at least one embodiment; FIG. 2A is an illustration of aspects of a secondary or device cooling loop that is associated with a primary cooling loop and that is part of a dual purpose cooling that includes a separate interconnect cooling loop for interconnect features in a computer module, in at least one embodiment; FIG. 2B is an illustration of aspects of an interconnect cooling loop of dual purpose cooling in a computer module, in at least one embodiment; FIG. 2C is an illustration of aspects for a design sub-system and a manufacturing sub-system to prepare a secondary or device cooling loop and an interconnect cooling loop as part of a dual purpose cooling in a computer module, in at least one embodiment; FIG. 2D illustration of further aspects for a manufacturing sub-system to prepare a secondary or device cooling loop and an interconnect cooling loop as part of a dual purpose cooling in a computer module, in at least one embodiment; FIG. 3 is an illustration of further computer module features incorporating the first and interconnect cooling loops for dual purpose cooling, in at least one embodiment; FIG. 4 illustrates rack aspects in a system for dual purpose cooling, according to at least one embodiment; FIG. 5A illustrates a process flow for a system for dual purpose cooling, in at least one embodiment; FIG. 5B illustrates yet another process flow for a system for dual purpose cooling, in at least one embodiment; and FIG. 6 illustrates an example datacenter, in which at least one embodiment from FIGS. 1-5B may be used. DETAILED DESCRIPTION FIG. 1 is an illustration of an example system 100 subject to dual purpose cooling that includes cooling for interconnects, in at least one embodiment. To address limitations in liquid cooling in a datacenter, instead of reliance on only high-conductive materials such as metals and superconductors used for interconnect features and to improve interconnect performance in a linear manner, enhanced liquid cooling may be provided in the system. As used herein, the interconnect features may be conductive portions of a circuit board that may be between computing circuitry or computing features. For instance, the interconnect features may include metal traces, plated and non-plated through-holes, solder points, transmission lines, and electrically-insulating circuit board material over which such copper traces and solder points may lie. An interconnect feature may pass along sides and across the circuit board to contact between computing circuitry or features, and may include chip to chip interconnects, such as an NVlink® interconnect, a PCIe® high speed communication interconnect, among other interconnects that may exist on a circuit board. The enhanced liquid cooling may use at least two distinct cooling loops, also referred to herein as an interconnect cooling loop for the interconnect features and a secondary or device cooling loop for the computing circuitry or features, which may include processors, network adapters (including a Network Interface Controller (NIC)), input/output (I/O) devices, peripheral devices or components on a system-on-chip (SoC), devices and components at which a signal is received or measured, or any other computing circuitry that may not only be used to only transmit signals. The secondary or device cooling loop may be associated with a primary-to-secondary cooling loop infrastructure (including heat exchangers and coolant or fluid distribution units (CDUs)) provided to cool computing features and is different from the interconnect cooling loop used to cool interconnect features. The interconnect cooling loop may provide cooling for interconnect features that may include pathways, and may provide such cooling within a range of 0 to 123 degrees Kelvin (or less than zero degrees Centigrade (°C)). Further, the interconnect cooling loop is provided to maintain a temperature through the c