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US-20260129818-A1 - DUAL-SIDED MOLD GRID ARRAY WITH A COPPER POST ISOLATION WALL AND METHOD OF FORMING SAME

US20260129818A1US 20260129818 A1US20260129818 A1US 20260129818A1US-20260129818-A1

Abstract

An electronic package for mounting to a circuit board is provided. The electronic package comprises a substrate, and first and second electronic modules. The substrate has opposed first and second sides. The first and second electronic modules are disposed on the second side of the substrate to be spaced apart from each other. Third and fourth electronic modules are disposed on the first side of the substrate and spaced apart from each other. The electronic package also comprises at least one wall section disposed between the first and second electronic modules. The at least one wall section is mounted on the second side of the substrate. The at least one wall section is configured to electromagnetically shield the first and second electronic modules from each other. Further provided are methods of forming the electronic package.

Inventors

  • Howard E. Chen

Assignees

  • SKYWORKS SOLUTIONS, INC.

Dates

Publication Date
20260507
Application Date
20251027

Claims (20)

  1. 1 . An electronic package for mounting to a circuit board, the electronic package comprising: a substrate having opposed first and second sides; first and second electronic modules disposed on the second side of the substrate and spaced apart from each other; third and fourth electronic modules disposed on the first side of the substrate and spaced apart from each other; and at least one wall section disposed between the first and second electronic modules, the at least one wall section formed of an electrically conductive material and mounted on the second side of the substrate, the at least one wall section being configured to electromagnetically shield the first and second electronic modules from each other.
  2. 2 . The electronic package of claim 1 , wherein the at least one wall section is coupled to at least one of a plurality of interfaces formed of an electrically conductive material and provided on the second side of the substrate.
  3. 3 . The electronic package of claim 2 , wherein the at least one wall section is integrally formed as a unitary piece with the at least one of the plurality of interfaces.
  4. 4 . The electronic package of claim 2 , wherein the at least one wall section is offset from a center of the at least one of the plurality of interfaces.
  5. 5 . The electronic package of claim 2 , wherein an intermediate element couples the at least one wall section to the at least one of the plurality of interfaces.
  6. 6 . The electronic package of claim 1 , wherein the first side of the substrate corresponds to a top surface of the electronic package and the second side of the substrate corresponds to a bottom surface of the electronic package, the bottom surface of the electronic package being configured for mounting to a surface of a separate circuit board.
  7. 7 . The electronic package of claim 1 , wherein the at least one wall section comprises a plurality of wall sections, first and second ones of the plurality of wall sections being aligned substantially perpendicular to each other.
  8. 8 . The electronic package of claim 1 , wherein one or more solder portions are disposed on an exposed surface of the at least one wall section for coupling the electronic package to a separate circuit board.
  9. 9 . The electronic package of claim 1 , wherein a second side mold structure extends over at least part of the second side of the substrate to at least partially encapsulate the at least one wall section, a face of the at least one wall section being exposed through the second side mold structure.
  10. 10 . The electronic package of claim 9 , wherein the exposed face of the at least one wall section is flush with an exposed surface of the second side mold structure.
  11. 11 . An electronic device including an electronic sub-assembly, the electronic sub-assembly comprising: a circuit board; and an electronic package mounted to the circuit board, the electronic package including a substrate having opposed first and second sides, first and second electronic modules disposed on the second side of the substrate to be spaced apart from each other, and at least one wall section disposed between the first and second electronic modules, the at least one wall section mounted on the second side of the substrate, the at least one wall section configured to electromagnetically shield the first and second electronic modules from each other.
  12. 12 . A method for manufacturing an electronic package for mounting to a circuit board, the method comprising: providing a substrate having opposed first and second sides; arranging first and second electronic modules on the second side of the substrate to be spaced apart from each other; arranging third and fourth electronic modules on the first side of the substrate to be spaced apart from each other; and arranging or forming at least one electrically conductive wall section on the second side of the substrate between the first and second electronic modules, the at least one wall section configured to electromagnetically shield the first and second electronic modules from each other.
  13. 13 . The method of claim 12 , wherein arranging or forming the at least one wall section on the second side of the substrate comprises coupling the at least one wall section to at least one of a plurality of interfaces provided on the second side of the substrate.
  14. 14 . The method of claim 13 , wherein arranging or forming the at least one wall section on the second side of the substrate is performed such that the at least one wall section is offset from a center of the at least one of the plurality of interfaces.
  15. 15 . The method of claim 12 , wherein arranging or forming the at least one wall section on the second side of the substrate is performed such that the at least one wall section extends around at least 50%, or at least 60%, or at least 70% of a perimeter of one of the first and second electronic modules.
  16. 16 . The method of claim 15 , wherein arranging or forming the at least one wall section on the second side of the substrate is performed such that the at least one wall section extends around an entire perimeter of the one of the first and second electronic modules.
  17. 17 . The method of claim 12 , wherein arranging or forming the at least one wall section on the second side of the substrate comprises arranging or forming a plurality of wall sections on the second side of the substrate, the first and second electronic modules being arranged on the second side of the substrate and the plurality of wall sections being arranged or formed on the second side of the substrate such that the plurality of wall sections are successively arranged to extend around an entire perimeter of one of the first and second electronic modules.
  18. 18 . The method of claim 12 , further comprising providing one or more solder portions on an exposed surface of the at least one wall section for coupling the electronic package to a separate circuit board.
  19. 19 . The method of claim 12 , further comprising arranging a second side mold structure over at least part of the second side of the substrate to fully encapsulate the at least one wall section within the second side mold structure.
  20. 20 . The method of claim 19 , further comprising removing a portion of the second side mold structure to expose a face of the at least one wall section through the second side mold structure such that the exposed face of the at least one wall section is flush with an exposed surface of the second side mold structure and disposing one or more solder portions on the exposed face of the at least one wall section for coupling the electronic package to a separate circuit board.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority under 35 U.S.C. § 119(e) to U.S. Provisional Patent Application Serial No. 63/716,422, titled “DUAL-SIDED MOLD GRID ARRAY WITH A COPPER POST ISOLATION WALL”, filed November 5, 2024, and to U.S. Provisional Patent Application Serial No. 63/716,424, titled “METHOD OF FORMING A DUAL-SIDED MOLD GRID ARRAY WITH A COPPER POST ISOLATION WALL”, filed November 5, 2024, the entire content of each being incorporated herein by reference for all purposes. BACKGROUND Field The present disclosure relates to an electronic package for mounting to a circuit board. The present disclosure also relates to an electronic device comprising an electronic package mounted to a circuit board. The present disclosure also relates to a method of manufacturing an electronic package. Description of the Related Technology Conventional electronic packages may have two or more electronic modules mounted to a bottom side of a substrate panel of the electronic package. To avoid or reduce radio frequency electromagnetic radiation emissions from one of the electronic modules adversely affecting operation of the other of the electronic modules, the electronic modules may be separated from each other by a line of solder balls, the line of solder balls forming part of a ball grid array. The solder balls of the ball grid array are arranged in a grid of rows and columns, with adjacent ones of the solder balls separated from each other by a predetermined pitch. The primary function of the solder balls of the ball grid array is to allow the electronic package to be coupled to a separate circuit board. The line of solder balls located between the two electronic modules serves as a form of electromagnetic shielding to reduce radio-frequency (RF) electromagnetic radiation emissions from one of the electronic modules adversely affecting operation of the other of the electronic modules. SUMMARY According to one embodiment, there is provided an electronic package for mounting to a circuit board. The electronic package comprises a substrate having opposed first and second sides, first and second electronic modules disposed on the second side of the substrate and spaced apart from each other, third and fourth electronic modules disposed on the first side of the substrate and spaced apart from each other, at least one wall section disposed between the first and second electronic modules, the at least one wall section mounted on the second side of the substrate, the at least one wall section being configured to electromagnetically shield the first and second electronic modules from each other. In one example, the at least one wall section is coupled to at least one of a plurality of interfaces provided on the second side of the substrate. In one example, the at least one wall section is integrally formed as a unitary piece with the at least one of the plurality of interfaces. In one example, the at least one wall section is electroplated onto the at least one of the plurality of interfaces. In one example, the at least one wall section is coupled to two or more of the plurality of interfaces. In one example, the at least one wall section is substantially formed of an electrically conductive material. In one example, the at least one wall section is substantially formed of copper. In one example, the at least one of the plurality of interfaces is formed of an electrically conductive material. In one example, the at least one wall section and the at least one of plurality of interfaces are formed of a same material. In one example, the at least one wall section and the at least one of the plurality of interfaces are each substantially formed of copper. In one example, the first side of the substrate corresponds to a top surface of the electronic package and the second side of the substrate corresponds to a bottom surface of the electronic package. In one example, the bottom surface of the electronic package is configured for mounting to a surface of a separate circuit board. In one example, the plurality of interfaces comprises a grid of rows and columns of the plurality of interfaces. In one example, the at least one wall section is coupled to at least one of the plurality of interfaces and offset from a center of the at least one of the plurality of interfaces . In one example, an intermediate element couples the at least one wall section to the at least one of the plurality of interfaces. In one example, the intermediate element comprises or consists of a solder ball. In one example, the at least one of the plurality of interfaces comprises a metallic contact pad. In one example, the metallic contact pad is coupled to a via extending from the first side of the substrate. In one example, the metallic contact pad is integrally formed as a unitary piece with the via. In one example, the at least one wall section extends over the second side of the substrate along a linear path between opposed