US-20260129883-A1 - RESISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

US20260129883A1US 20260129883 A1US20260129883 A1US 20260129883A1US-20260129883-A1

Abstract

A resistor structure is provided. The resistor structure includes a substrate, a first well region formed in the substrate, a poly layer over the first well region, an isolation structure disposed between the poly layer and the first well region, and an interconnect structure. The poly layer has a first end, a second end and a point between the first and second ends. The interconnect structure is electrically connected between the point of the poly layer and the first well region.

Inventors

Ping-Hsiang Huang
YOU-SHIUN CHOU
Chu Fu CHEN

Assignees

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Dates

Publication Date: 20260507
Application Date: 20241106

Claims (20)

1 . A resistor structure, comprising: a substrate; a first well region formed in the substrate; a poly layer over the first well region, having a first end, a second end and a point between the first and second ends; an isolation structure disposed between the poly layer and the first well region; and an interconnect structure electrically connected between the point of the poly layer and the first well region.
2 . The resistor structure of claim 1 , wherein in the poly layer, a distance between the first end and the point is equal to a distance between the second end and the point.
3 . The resistor structure of claim 1 , wherein the substrate and the first well region have different conductive types.
4 . The resistor structure of claim 1 , further comprising: a deep well region formed between the substrate and the first well region, wherein the substrate and the first well region have a first conductive type, and the deep well region has a second conductive type.
5 . The resistor structure of claim 4 , further comprising: a second well region laterally surrounding the first well region, and having the second conductive type, wherein the substrate is separated from the first and second well regions by the deep well region.
6 . The resistor structure of claim 1 , wherein the interconnect structure is configured to provide a bias voltage from the point of the poly layer to bias the first well region.
7 . The resistor structure of claim 6 , wherein the bias voltage is equal to half the sum of a first voltage of the first end and a second voltage of the second end.
8 . The resistor structure of claim 7 , wherein a voltage difference between the first and second voltages is greater than 5V.
9 . A resistor structure, comprising: a substrate; and a resistor string over the substrate and comprising a plurality of poly resistors connected in series, wherein each of the poly resistors comprises: a first well region formed in the substrate; a poly layer over the first well region, having a first end, a second end and a point between the first and second ends; an isolation structure disposed between the poly layer and the first well region; and an interconnect structure configured to provide a bias voltage from the point of the poly layer to the first well region, wherein the first well regions of the poly resistors are separated by the substrate.
10 . The resistor structure of claim 9 , wherein in the poly layer of each of the poly resistors, a distance between the first end and the point is equal to a distance between the second end and the point.
11 . The resistor structure of claim 9 , wherein the substrate and the first well regions of the poly resistors have different conductive types.
12 . The resistor structure of claim 9 , wherein the bias voltages provided to the first well regions of the poly resistors are different.
13 . The resistor structure of claim 9 , wherein each of the poly resistors further comprises: a deep well region formed between the substrate and the first well region, wherein the substrate and the first well region have a first conductive type, and the deep well region has a second conductive type.
14 . The resistor structure of claim 13 , wherein each of the poly resistors further comprises: a second well region laterally surrounding the first well region, and having the second conductive type, wherein the substrate is separated from the first and second well regions by the deep well region.
15 . The resistor structure of claim 9 , wherein in two adjacent poly resistors of the poly resistors, the second end of the poly layer of one poly resistor is coupled to the first end of the poly layer of the other poly resistor through another interconnect structure.
16 . The resistor structure of claim 9 , wherein in two adjacent poly resistors of the poly resistors, the second end of the poly layer of one poly resistor extends to and contact the first end of the other poly resistor.
17 . A method for manufacturing a resistor structure, comprising: forming a first well region in a substrate; forming an isolation structure in the first well region; forming a poly layer over the isolation structure; and forming an interconnect structure between a point of the poly layer and the first well region.
18 . The method of claim 17 , wherein the poly layer has a first end and a second end, and a distance between the first end and the point is equal to a distance between the second end and the point.
19 . The method of claim 17 , wherein the substrate and the first well region have different conductive types.
20 . The method of claim 17 , further comprising: forming a deep well region between the substrate and the first well region; and forming a second well region to laterally surround the first well region, wherein the substrate and the first well region have a first conductive type, and the deep well region and the second well region have a second conductive type, wherein the substrate is separated from the first and second well regions by the deep well region.

Description

BACKGROUND Resistor is a passive device most basic in analog circuit and/or a mixed-signal system. With the evolution of technique, the resistor is evolved to a polysilicon (poly) resistor in an integrated circuit. Resistance does not change with the voltage change for being added in its both ends or temperature in some applications requiring high accuracy or high stability, such as analog-to-digital converter (ADC), digital-to-analog converter (DAC), voltage regulator or voltage converter. The resistance drift of poly resistor will cause the distortion of output signal of circuits, greatly affecting the performance of the applications. BRIEF DESCRIPTION OF THE DRAWINGS Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. FIGS. 1A and 1B illustrate a semiconductor structure and an equivalent circuit (or a symbol) of a poly resistor, respectively, in accordance with some embodiments of the disclosure. FIG. 2 illustrates a semiconductor structure of a poly resistor applied with an external bias voltage for biasing the N-type well region. FIG. 3 illustrates the relationship between various electric fields and resistance drifts. FIGS. 4A and 4B illustrate a semiconductor structure and an equivalent circuit (or a symbol) of a poly resistor, respectively, in accordance with some embodiments of the disclosure. FIG. 5 illustrates a circuit diagram of a buck converter, in accordance with some embodiments of the disclosure. FIG. 6 illustrates a circuit diagram of a boost converter, in accordance with some embodiments of the disclosure. FIGS. 7A and 7B illustrate a semiconductor structure and an equivalent circuit of a resistor string, respectively, in accordance with some embodiments of the disclosure. FIGS. 8A and 8B illustrate a semiconductor structure and an equivalent circuit of a resistor string, respectively, in accordance with some embodiments of the disclosure. FIG. 9 illustrates a semiconductor structure of a resistor string, in accordance with some embodiments of the disclosure. FIG. 10 illustrates a circuit diagram of a voltage divider, in accordance with some embodiments of the disclosure. FIG. 11 illustrates a circuit diagram of a low-dropout regulator (LDO), in accordance with some embodiments of the disclosure. FIG. 12 is a flowchart illustrating a method for manufacturing a resistor structure, in accordance with some embodiments of the disclosure. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described to simplify the disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed therebetween. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper,” “lower,” “left,” “right” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly. It should be understood that when an element is referred to as being “connected to” or “coupled to” another element, it may be directly connected to or coupled to the other element, or intervening elements may be present. As used herein, although the terms such as “first,” “second” and “third” describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region, layer or section from another. The terms such as “first,” “second” and “third” when used herein do not imply a sequence or order unless clearly indicated by the context. Various poly resistor structures in integrat