US-20260129898-A1 - SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME

US20260129898A1US 20260129898 A1US20260129898 A1US 20260129898A1US-20260129898-A1

Abstract

A semiconductor device includes a substrate, a seed layer on the substrate, an epitaxy stack on the seed layer, and a gate structure on the epitaxy stack. The semiconductor device further includes a source structure and a drain structure on opposite sides of the gate structure, respectively. The semiconductor device further includes an isolation region corresponding to an end region of the gate structure. The isolation region is adjacent to the end region of the gate structure. The isolation region is positioned outside the end region of the gate structure. The isolation region is not in contact with the gate structure.

Inventors

Yi-Wei Lien
Hsin-Chang Tsai

Assignees

VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION

Dates

Publication Date: 20260507
Application Date: 20241101

Claims (20)

1 . A semiconductor device, comprising: a substrate; a seed layer on the substrate; an epitaxial stack on the seed layer; a gate structure on the epitaxial stack; a source structure and a drain structure on opposite sides of the gate structure, respectively; and an isolation region corresponding to an end region of the gate structure, wherein the isolation region is positioned outside the end region of the gate structure, and the isolation region is not in contact with the gate structure.
2 . The semiconductor device of claim 1 , wherein the gate structure surrounds the source structure and is separated from the source structure from a top view above the substrate.
3 . The semiconductor device of claim 1 , wherein an inner edge of the isolation region corresponds to and extends along an outer edge of the end region of the gate structure.
4 . The semiconductor device of claim 1 , wherein an edge of the isolation region adjacent to the end region of the gate structure has a recess, and the recess is complementary with a shape of the end region.
5 . The semiconductor device of claim 1 , wherein the isolation region and the end region of the gate structure are separated by a distance.
6 . The semiconductor device of claim 1 , wherein the isolation region is a doped region, comprising a nitrogen-containing dopant.
7 . The semiconductor device of claim 1 , wherein the gate structure comprising: a doped compound semiconductor layer on the epitaxial stack; and a gate electrode on the doped compound semiconductor layer, wherein the isolation region is not in contact with the doped compound semiconductor layer.
8 . The semiconductor device of claim 7 , wherein the isolation region and the doped compound semiconductor layer comprise dopants of different materials.
9 . The semiconductor device of claim 1 , wherein the gate structure comprising: a first gate portion and a second gate portion on opposite sides of the source structure, respectively; and a bending portion connecting the first gate portion to the second gate portion, wherein the isolation region is positioned outside the bending portion.
10 . The semiconductor device of claim 9 , wherein the isolation region corresponds outside the bending portion and extends along an outer edge of the bending portion from a top view above the substrate.
11 . The semiconductor device of claim 9 , wherein the isolation region has a recess close to an edge of the bending portion of the gate structure, the recess is complementary with a shape of the bending portion.
12 . The semiconductor device of claim 1 , wherein the isolation region further comprises a portion positioned on an end region of the source structure.
13 . The semiconductor device of claim 1 , wherein the isolation region is positioned outside an end region of the source structure.
14 . The semiconductor device of claim 1 , wherein there is a gap region between an end region of the source structure and the end region of the gate structure, the gap region is a portion of the isolation region.
15 . The semiconductor device of claim 1 , wherein there is a gap region between an end region of the source structure and the end region of the gate structure, and the isolation region is positioned outside the gap region.
16 . The semiconductor device of claim 1 , wherein the source structure and the drain structure extend along a first direction, and are separated from the gate structure in a second direction, wherein the isolation region extends along the second direction and has at least one recess close to the end region of the gate structure, and the recess is complementary with a shape of the end region of the gate structure.
17 . The semiconductor device of claim 1 , wherein the isolation region is a first isolation region positioned outside a first end region of the gate structure, and the semiconductor device further comprising: a second isolation region positioned outside a second end region of the gate structure, wherein the first end region and the second end region are opposite ends of the gate structure, and the first isolation region and the second isolation region are not in contact with the gate structure.
18 . A method for forming a semiconductor device, comprising: providing a substrate; forming a seed layer on the substrate; forming an epitaxial stack on the seed layer; forming a gate structure on the epitaxial stack; forming an isolation region corresponding to an end region of the gate structure, wherein the isolation region is positioned outside the end region of the gate structure and is not in contact with the gate structure from a top view above the substrate; and forming a source structure and a drain structure on opposite sides of the gate structure, respectively.
19 . The method of claim 18 , wherein the source structure is formed surrounded by and separated from the gate structure from a top view above the substrate.
20 . The method of claim 18 , wherein an inner edge of the isolation region corresponds to and extends along an outer edge of the end region of the gate structure.

Description

BACKGROUND Technical Field The present disclosure relates to a semiconductor device and methods for forming the same, and in particular, it relates to a semiconductor device and methods for effectively improving the electrical performance of the semiconductor device. Description of the Related Art In recent years, there has been rapid development in semiconductor devices for use in the fields of computers and consumer electronics, among other fields. Currently, semiconductor device technology in the product market for metal-oxide-semiconductor field-effect transistors (MOSFETs) has been widely accepted and held a significant market share. Semiconductor devices are used in various electronic applications, such as high-power devices, personal computers, mobile phones, digital cameras, and the like. These semiconductor devices are typically fabricated by depositing an insulating or dielectric material, a conductive material, or a semiconductor material on a substrate, followed by patterning the various material layers using lithography and etching processes. Therefore, circuit devices and components may be formed on the substrate. Among these devices, high-electron mobility transistors (HEMTs) have certain advantages, including high output power and high breakdown voltage, and thus they are widely used in high-power applications. Even though existing semiconductor devices have generally been adequate for their intended purposes, they have not been entirely satisfactory in all respects. There are still issues regarding their structure and manufacture methods that still need to be addressed. SUMMARY An embodiment of the present disclosure provides a semiconductor device, the semiconductor device includes: a substrate; a seed layer on the substrate; an epitaxial stack on the seed layer; and a gate structure on the epitaxial stack. The semiconductor device further includes: a source structure and a drain structure on opposite sides of the gate structure, respectively; and an isolation region corresponding to an end region of the gate structure. The isolation region is positioned outside the end region of the gate structure, and the isolation region is not in contact with the gate structure. Another embodiment of the present disclosure provides a method for forming a semiconductor device, the method includes: providing a substrate; forming a seed layer on the substrate; forming an epitaxial stack on the seed layer; and forming a gate structure on the epitaxial stack. The method further includes: forming an isolation region corresponding to an end region of the gate structure; and forming a source structure and a drain structure on opposite sides of the gate structure, respectively. The isolation region is positioned outside the end region of the gate structure and is not in contact with the gate structure from a top view above the substrate. BRIEF DESCRIPTION OF THE DRAWINGS The disclosure can be more fully understood from the following detailed description when read with the accompanying figures. It is worth noting that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. FIG. 1 is a top view of a semiconductor device, according to some embodiments of the present disclosure. FIG. 2 is a partial top view of another semiconductor device, according to some embodiments of the present disclosure. FIG. 3 is a cross-sectional view of a semiconductor device, according to some embodiments of the present disclosure. FIGS. 4A-4D are cross-sectional views of the semiconductor device illustrated in FIG. 3 at various intermediate stages, according to some embodiments of the present disclosure. FIG. 5 is a top view of another semiconductor device, according to some embodiments of the present disclosure. FIG. 6 is a top view of another semiconductor device, according to some embodiments of the present disclosure. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the semiconductor device provided. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, a first feature is formed on a second feature in the description that follows may include embodiments in which the first feature and second feature are formed in direct contact, and may also include embodiments in which additional features may be formed between the first feature and second feature, so that the first feature and second feature may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity, and does not in itself dictate a relationship between various embodiments