US-20260129910-A1 - SEMICONDUCTOR DEVICE

Abstract

A semiconductor device may include a substrate, source/drain electrodes on the substrate, a channel layer on the source/drain electrodes, a barrier film on the channel layer, a gate electrode on the barrier film, and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer including metal oxide, wherein the channel layer may include an oxide semiconductor material, and the oxide semiconductor material may include tellurium (Te) oxide and one or more oxides of sulfur (S) or selenium (Se).

Inventors

• Bonwon KOO
• Yong Young Noh
• Young Jae Kang
• Kiyeon YANG
• Jaeyun Lee
• Minwoo Choi

Assignees

• SAMSUNG ELECTRONICS CO., LTD.
• POSTECH Research and Business Development Foundation

Dates

Publication Date

20260507

Application Date

20250725

Priority Date

20241107

Claims (20)

1. 1 . A semiconductor device comprising: a substrate; source/drain electrodes on the substrate; a channel layer on the source/drain electrodes; a barrier film on the channel layer; a gate electrode on the barrier film; and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer including metal oxide, wherein the channel layer includes an oxide semiconductor material, and the oxide semiconductor material includes tellurium (Te) oxide and one or more oxides of sulfur (S) or selenium (Se).
2. 2 . The semiconductor device of claim 1 , wherein a work function of the intermediate layer is smaller than a work function of the channel layer and greater than a work function of the gate electrode.
3. 3 . The semiconductor device of claim 1 , wherein a ratio (W I /W C ) of a work function (W I ) of the intermediate layer to a work function (W C ) of the channel layer is 0.5 or more and less than 1.
4. 4 . The semiconductor device of claim 1 , wherein a ratio (W I /W G ) of a work function (W I ) of the intermediate layer to a work function (W G ) of the gate electrode is more than 1 and 2 or less.
5. 5 . The semiconductor device of claim 1 , wherein the metal oxide has an oxygen deficient composition.
6. 6 . The semiconductor device of claim 5 , wherein the metal oxide includes one or more selected from the group consisting of WOx, MoOx, InOx, SnOx, and GaOx.
7. 7 . The semiconductor device of claim 1 , wherein a ratio (T1/T2) of a thickness (T1) of the intermediate layer to a thickness (T2) of the channel layer is 0.001 or more and 10 or less.
8. 8 . The semiconductor device of claim 1 , wherein a thickness of the intermediate layer of 0.1 nm or more and 10 nm or less.
9. 9 . The semiconductor device of claim 1 , wherein a thickness (T1) of the intermediate layer is smaller than a thickness (T2) of the channel layer.
10. 10 . The semiconductor device of claim 1 , wherein the intermediate layer surrounds at least a portion of the source/drain electrodes.
11. 11 . The semiconductor device of claim 1 , wherein the oxide semiconductor material is of a p-type.
12. 12 . The semiconductor device of claim 1 , wherein the oxide semiconductor material is amorphous.
13. 13 . The semiconductor device of claim 1 , wherein the oxide semiconductor material has an oxygen-deficient composition.
14. 14 . The semiconductor device of claim 13 , wherein moles of oxygen (O) per one mole of tellurium (Te) in the oxide semiconductor material are 0.8 to 1.7.
15. 15 . The semiconductor device of claim 1 , wherein the oxide semiconductor material is represented by the following Chemical formula 1: Te a Q b O x [Chemical Formula 1] in Chemical formula 1, Q is one or more of sulfur (S) or selenium (Se), and 0<a≤1, 0<b≤1, and 0<x≤4.
16. 16 . The semiconductor device of claim 15 , wherein the oxide semiconductor material includes Q in an amount of 0.5 at % to 5 at % relative to a total number of atoms of tellurium (Te), Q, and oxygen (O).
17. 17 . The semiconductor device of claim 1 , wherein tellurium (Te) included in the oxide semiconductor material includes ionized tellurium and non-ionized tellurium.
18. 18 . The semiconductor device of claim 1 , wherein the oxide semiconductor material includes selenium (Se), and the selenium (Se) includes ionized selenium.
19. 19 . A semiconductor device comprising: a substrate; an insulating layer on the substrate; source/drain electrodes on the substrate; a channel layer on the source/drain electrodes; a barrier film on the channel layer; a gate electrode on the barrier film; and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer including metal oxide, wherein the channel layer includes an oxide semiconductor material that includes one or more of sulfur (S), selenium (Se) or tellurium (Te) and has an oxygen-deficient composition.
20. 20 . A semiconductor device comprising: a substrate; an insulating layer on the substrate; source/drain electrodes on the insulating layer; a channel layer on the source/drain electrodes; a barrier film on the channel layer; a gate electrode on the barrier film; and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer surrounding at least a portion of the source/drain electrodes, the intermediate layer including metal oxide having an oxygen-deficient composition, wherein the channel layer includes a p-type oxide semiconductor material that includes one or more of sulfur (S), selenium (Se) or tellurium (Te), and has an oxygen-deficient composition and an amorphous structure, and a work function of the intermediate layer is smaller than a work function of the channel layer and greater than a work function of the gate electrode.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims priority to Korean Patent Application No. 10-2024-0157439 filed on Nov. 7, 2024 and all the benefits accruing therefrom under 35 U.S.C. § 119, the contents of which are incorporated by reference in its entirety. BACKGROUND The present disclosure relates to semiconductor devices. Oxide semiconductor materials generally have a larger band gap than silicon-based semiconductors. Oxide semiconductor materials with a larger band gap have low leakage current and relatively good electrical performance. In general, as p-type oxide semiconductors, materials including copper (Cu), tin (Sn), or nickel (Ni) has been known, but their hole field effect mobility is insufficient, which limits the development of devices including PN junction diodes (e.g., complementary metal-oxide-semiconductors (CMOS)). In a field effect transistor (FET) having a channel layer including a p-type oxide semiconductor, the channel layer and source/drain electrodes have a relatively large difference in work function, which increases the contact resistance (Rcnt), and thus there is a problem in that holes do not smoothly move. SUMMARY Some example embodiment of the present disclosure provide semiconductor devices that reduce or prevent the problem of increased contact resistance due to a difference in work function between a channel layer and source/drain electrodes. Effects of the present disclosure are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those of ordinary skill in the art from the following description. According to an example embodiment of the present disclosure, a semiconductor device includes a substrate, source/drain electrodes on the substrate, a channel layer on the source/drain electrodes, a barrier film on the channel layer, a gate electrode on the barrier film, and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the an intermediate layer including metal oxide, wherein the channel layer includes an oxide semiconductor material, and the oxide semiconductor material includes tellurium (Te) oxide and one or more oxides of sulfur (S) or selenium (Se). According to an example embodiment of the present disclosure, a semiconductor device includes a substrate, an insulating layer on the substrate, source/drain electrodes on the substrate, a channel layer on the source/drain electrodes, a barrier film on the channel layer, a gate electrode on the barrier film, and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer including a metal oxide, wherein the channel layer includes an oxide semiconductor material that includes one or more of sulfur (S), selenium (Se) or tellurium (Te) and has an oxygen-deficient composition. According to an example embodiment of the present disclosure, a semiconductor device includes a substrate, an insulating layer on the substrate, source/drain electrodes on the insulating layer, a channel layer on the source/drain electrodes, a barrier film on the channel layer, a gate electrode on the barrier film, and an intermediate layer between a corresponding one of the source/drain electrodes and the channel layer, the intermediate layer surrounding at least a portion of the source/drain electrodes, the intermediate layer including metal oxide having an oxygen-deficient composition, wherein the channel layer includes a p-type oxide semiconductor material that includes one or more of sulfur (S), selenium (Se) or tellurium (Te), and has an oxygen-deficient composition and an amorphous structure, and a work function of the intermediate layer is smaller than a work function of the channel layer and greater than a work function of the gate electrode. BRIEF DESCRIPTION OF THE DRAWINGS The drawings shown in the present disclosure are according to some example embodiments, and ratios of the width, height or thickness of each component is for describing the present disclosure in detail, and the ratio may be different from the actual ones. In addition, each component illustrated in the drawings may be exaggerated to describe the present disclosure in detail. In addition, in a coordinate system shown in the drawing, each axis may be perpendicular to the others, a direction pointed by an arrow may be a + direction, and a direction opposite to the direction pointed by the arrow (a direction rotated by 180 degrees) may be a − direction, in which: FIG. 1 is a plan view showing at least a portion of a semiconductor device according to an example embodiment of the present disclosure; and FIG. 2 is an enlarged view of area A in FIG. 1. DETAILED DESCRIPTION OF EMBODIMENTS Unless specifically limited in the present specification, the units of properties may follow the International System of Units (SI). As used herein, expressions such as “one of,” “one or more of,” “any one of,” and “at leas