US-20260129913-A1 - OXIDE SEMICONDUCTOR THIN-FILM TRANSISTOR

Abstract

An oxide semiconductor thin-film transistor includes a gate electrode, a source electrode, a drain electrode, an oxide semiconductor layer connected to the source electrode and the drain electrode, and a gate insulating film between the gate electrode and the oxide semiconductor layer in a layering direction. The oxide semiconductor layer includes a channel region. The gate insulating film includes a metal oxide film and a first insulating film made of silicon nitride and/or silicon oxynitride. A part of the first insulating film is disposed between the metal oxide film and the oxide semiconductor layer. At least a part of a first end of the metal oxide film lies on the channel region and faces either one of the source electrode and the drain electrode in a planar view.

Inventors

• Hiroyuki Sekine
• Shigeru Kimura

Assignees

• Tianma Japan, Ltd.

Dates

Publication Date

20260507

Application Date

20251104

Priority Date

20241106

Claims (8)

1. 1 . An oxide semiconductor thin-film transistor comprising: a gate electrode; a source electrode; a drain electrode; an oxide semiconductor layer connected to the source electrode and the drain electrode; and a gate insulating film between the gate electrode and the oxide semiconductor layer in a layering direction; wherein the oxide semiconductor layer includes a channel region, wherein the gate insulating film includes: a metal oxide film; and a first insulating film made of silicon nitride and/or silicon oxynitride, wherein a part of the first insulating film is disposed between the metal oxide film and the oxide semiconductor layer, and wherein at least a part of a first end of the metal oxide film lies on the channel region and faces either one of the source electrode and the drain electrode in a planar view.
2. 2 . The oxide semiconductor thin-film transistor according to claim 1 , wherein the minimum distance between the first end and the source electrode is shorter than the minimum distance between the first end and the drain electrode.
3. 3 . The oxide semiconductor thin-film transistor according to claim 2 , wherein the first end faces the source electrode in a planar view, wherein the metal oxide film includes a second end facing the drain electrode in the planar view, and wherein at least a part of the second end lies on the channel region in the planar view.
4. 4 . The oxide semiconductor thin-film transistor according to claim 1 , wherein the metal oxide film has an island-like shape, wherein the metal oxide film has a smaller area than the channel region in a planar view, and wherein the entire metal oxide film lies on the channel region in the planar view.
5. 5 . The oxide semiconductor thin-film transistor according to claim 1 , wherein the entire surface of the metal oxide film is surrounded by the first insulating film.
6. 6 . The oxide semiconductor thin-film transistor according to claim 5 , wherein the minimum distance between the centroid of the metal oxide film and the source electrode in a planar view is shorter than the minimum distance between the centroid of the metal oxide film and the drain electrode in the planar view.
7. 7 . The oxide semiconductor thin-film transistor according to claim 1 , wherein the metal oxide film has an interface with the gate electrode.
8. 8 . The oxide semiconductor thin-film transistor according to claim 1 , wherein the metal oxide film is made of silicon oxide and the first insulating film is made of silicon nitride.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This non-provisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No. 2024-194387 filed in Japan on Nov. 6, 2024, the entire content of which is hereby incorporated by reference. BACKGROUND This disclosure relates to oxide semiconductor thin-film transistors. Thin-film transistors (TFTs) are used in various fields such as display devices and radiation sensors. A TFT having an active layer made of an oxide semiconductor represented by InGaZnO (IGZO) attains high mobility, despite its amorphous structure. However, controlling its threshold voltage is difficult because the added donors and acceptors make it difficult to control the Fermi energy. SUMMARY An oxide semiconductor thin-film transistor according to an aspect of this disclosure includes a gate electrode, a source electrode, a drain electrode, an oxide semiconductor layer connected to the source electrode and the drain electrode, and a gate insulating film between the gate electrode and the oxide semiconductor layer in a layering direction. The oxide semiconductor layer includes a channel region. The gate insulating film includes a metal oxide film and a first insulating film made of silicon nitride and/or silicon oxynitride. A part of the first insulating film is disposed between the metal oxide film and the oxide semiconductor layer. At least a part of a first end of the metal oxide film lies on the channel region and faces either one of the source electrode and the drain electrode in a planar view. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 illustrates an X-ray sensor. FIG. 2 illustrates a cross-sectional structure of a pixel of an X-ray sensor. FIG. 3 is a cross-sectional diagram schematically illustrating a configuration example of an oxide semiconductor TFT having a gate insulating film made of a layered SiNx/SiOx/SiNx film. FIG. 4A is a band diagram for illustrating the movement of carriers when an oxide semiconductor TFT is being irradiated with X-rays. FIG. 4B is another band diagram for illustrating the movement of carriers when an oxide semiconductor TFT is being irradiated with X-rays. FIG. 5 is a cross-sectional diagram schematically illustrating the configuration of an oxide semiconductor TFT in an embodiment of this disclosure. FIG. 6 is a plan diagram schematically illustrating positional relations among the silicon oxide film, the channel region, and some other components in an oxide semiconductor TFT. FIG. 7A schematically illustrates a charge state occurring when the oxide semiconductor TFT in the embodiment illustrated in FIGS. 5 and 6 is supplied with a gate bias and irradiated with radioactive rays. FIG. 7B is a graph schematically illustrating the negative shift of the threshold voltage. FIG. 8A schematically illustrates another charge state occurring when the oxide semiconductor TFT in the embodiment illustrated in FIGS. 5 and 6 is supplied with a gate bias and irradiated with radioactive rays. FIG. 8B is a graph schematically illustrating the positive shift of the threshold voltage. FIG. 9 provides a graph illustrating the relations between the intensity of electric fields generated by planar charges having different areas and the distance from the planar charges. FIG. 10 is a cross-sectional diagram schematically illustrating the configuration of an oxide semiconductor TFT in another embodiment of this disclosure. FIG. 11 is a plan diagram schematically illustrating the positional relations among the silicon oxide film, the channel region, and some other components in the oxide semiconductor TFT illustrated in FIG. 10. FIG. 12 is a cross-sectional diagram schematically illustrating the configuration of an oxide semiconductor TFT in still another embodiment of this disclosure. FIG. 13 is a plan diagram schematically illustrating the positional relations among the silicon oxide film, the channel region, and some other components in the oxide semiconductor TFT illustrated in FIG. 12. FIG. 14A illustrates a planar charge infinitely spreading in both positive and negative directions along the Y-axis and the positive direction along the X-axis. FIG. 14B indicates the intensity of the Z-axis component of the electric field generated by the planar charge in FIG. 14A at different coordinates (x, z). FIG. 15 is a cross-sectional diagram schematically illustrating the configuration of an oxide semiconductor TFT in still another embodiment of this disclosure. FIG. 16 is a plan diagram schematically illustrating the positional relations among the silicon oxide film, the channel region, and some other components in the oxide semiconductor TFT illustrated in FIG. 15. FIG. 17 is a plan diagram schematically illustrating the configuration of an oxide semiconductor TFT in still another embodiment of