US-20260129922-A1 - SEMICONDUCTOR DEVICE

US20260129922A1US 20260129922 A1US20260129922 A1US 20260129922A1US-20260129922-A1

Abstract

A semiconductor device includes a voltage sustaining layer of a first conductivity type and a superjunction layer disposed in contact with an upper surface of the voltage sustaining layer. The superjunction layer includes first regions of the first conductivity type and second regions of a second conductivity type alternately arranged along a first direction. Each of the second regions includes a lower second region in contact with the voltage sustaining layer and an upper second region disposed in contact with an upper surface of the lower second region. A lower maximum width that is a maximum width in the first direction of the lower second region is greater than an upper maximum width that is a maximum width in the first direction of the upper second region. A density of fixed charges during depletion is higher in the lower second region than in the upper second region.

Inventors

Tomofumi Niibayashi
Jun Saito

Assignees

DENSO CORPORATION
TOYOTA JIDOSHA KABUSHIKI KAISHA
MIRISE Technologies Corporation

Dates

Publication Date: 20260507
Application Date: 20251007
Priority Date: 20241106

Claims (7)

1 . A semiconductor device comprising: a voltage sustaining layer of a first conductivity type; and a superjunction layer disposed in contact with an upper surface of the voltage sustaining layer, and including first regions of the first conductivity type and second regions of a second conductivity type alternately arranged along a first direction, wherein each of the second regions includes a lower second region in contact with the voltage sustaining layer and an upper second region disposed in contact with an upper surface of the lower second region, the lower second region has a lower maximum width that is a maximum width in the first direction of the lower second region, the upper second region has an upper maximum width that is a maximum width in the first direction of the upper second region, the lower maximum width is greater than the upper maximum width, and a density of fixed charges during depletion is higher in the lower second region than in the upper second region.
2 . The semiconductor device according to claim 1 , wherein the lower second region has a higher concentration of a second conductivity type impurity than the upper second region.
3 . The semiconductor device according to claim 1 , wherein a width in the first direction of the lower second region at an interface between the lower second region and the voltage sustaining layer is the lower maximum width.
4 . The semiconductor device according to claim 1 , wherein each of the first regions includes a lower first region in contact with the voltage sustaining layer and an upper first region disposed in contact with an upper surface of the lower first region, the lower first region is disposed between the lower second regions that are adjacent to each other in the first direction, the upper first region is disposed between the upper second regions that are adjacent to each other in the first direction, and the density of fixed charges during depletion is lower in the lower first region than in the upper first region.
5 . The semiconductor device according to claim 4 , wherein when viewed vertically from above the superjunction layer, the voltage sustaining layer has overlapping regions that overlap with the lower first regions and the lower second regions, a total amount of fixed charges in the overlapping regions during depletion is defined as an overlapping region total charge, a total amount of fixed charges in the lower first regions during depletion is defined as a first region total charge, a total amount of fixed charges in the lower second regions during depletion is defined as a second region total charge, and the second region total charge is equal to or greater than a sum of the first region total charge and the overlapping region total charge.
6 . The semiconductor device according to claim 1 , wherein the first conductivity type is n-type and the second conductivity type is p-type.
7 . A semiconductor device comprising: a voltage sustaining layer of a first conductivity type; and a superjunction layer disposed in contact with an upper surface of the voltage sustaining layer, and including first regions of the first conductivity type and second regions of a second conductivity type alternately arranged along a first direction, wherein each of the second regions includes a lower second region in contact with the voltage sustaining layer and an upper second region disposed in contact with an upper surface of the lower second region, the lower second region has a lower maximum width that is a maximum width in the first direction of the lower second region, the upper second region has an upper maximum width that is a maximum width in the first direction of the upper second region, the lower maximum width is greater than the upper maximum width, and the lower second region has a higher concentration of a second conductivity type impurity than the upper second region.

Description

CROSS REFERENCE TO RELATED APPLICATION The present application claims the benefit of priority from Japanese Patent Application No. 2024-194228 filed on Nov. 6, 2024. The entire disclosure of the above application is incorporated herein by reference. TECHNICAL FIELD The present disclosure relates to a semiconductor device. BACKGROUND Semiconductor devices are known that have a structure in which a superjunction (SJ) layer is disposed on an upper surface of a voltage sustaining layer (also referred to as a drift layer) that shares the breakdown voltage. In such semiconductor devices, since the SJ layer is substantially fully depleted, a depletion layer is formed over a wide area, making it possible to ensure sufficient breakdown voltage. SUMMARY A semiconductor device according to an aspect of the present disclosure includes a voltage sustaining layer of a first conductivity type and a superjunction layer disposed in contact with an upper surface of the voltage sustaining layer. The superjunction layer includes first regions of the first conductivity type and second regions of a second conductivity type alternately arranged along a first direction. Each of the second regions includes a lower second region in contact with the voltage sustaining layer and an upper second region disposed in contact with an upper surface of the lower second region. The lower second region has a lower maximum width that is a maximum width in the first direction of the lower second region. The upper second region has an upper maximum width that is a maximum width in the first direction of the upper second region. The lower maximum width may be greater than the upper maximum width. A density of fixed charges during depletion may be higher in the lower second region than in the upper second region. BRIEF DESCRIPTION OF DRAWINGS Objects, features and advantages of the present disclosure will become apparent from the following detailed description made with reference to the accompanying drawings. In the drawings: FIG. 1 is a cross-sectional view of a part of a semiconductor device according to a first embodiment; FIG. 2 is an enlarged view of a part of the vicinity of an SJ layer in the semiconductor device according to the first embodiment; FIG. 3 is an enlarged view of a part of the vicinity of an SJ layer in a semiconductor device of a comparative example; FIG. 4 is an enlarged view of a part of the vicinity of the SJ layer in the semiconductor device according to the first embodiment; FIG. 5 is a diagram illustrating a process for forming the SJ layer; FIG. 6 is a diagram illustrating a process for forming the SJ layer; FIG. 7 is a diagram illustrating a process for forming the SJ layer; FIG. 8 is an enlarged view of a part of the vicinity of the SJ layer in a semiconductor device according to a second embodiment; FIG. 9 is a diagram illustrating an effect in the second embodiment; FIG. 10 is a diagram illustrating a process for forming the SJ layer; FIG. 11 is an enlarged view of a part of the vicinity of an SJ layer in a semiconductor device according to a third embodiment; and FIG. 12 is a diagram showing examples of various cross-sectional shapes of lower second regions. DETAILED DESCRIPTION In semiconductor devices having a structure in which a superjunction layer is disposed on a drift layer, there are cases where a depletion layer is difficult to extend from the superjunction layer into the interior of the drift layer. In such cases, since an electric field inside the drift layer is low, there is a possibility that a breakdown voltage of the drift layer cannot be sufficiently ensured. A semiconductor device according to a first aspect of the present disclosure includes a voltage sustaining layer of a first conductivity type and a superjunction layer disposed in contact with an upper surface of the voltage sustaining layer. The superjunction layer includes first regions of the first conductivity type and second regions of a second conductivity type alternately arranged along a first direction. Each of the second regions includes a lower second region in contact with the voltage sustaining layer and an upper second region disposed in contact with an upper surface of the lower second region. The lower second region has a lower maximum width that is a maximum width in the first direction of the lower second region. The upper second region has an upper maximum width that is a maximum width in the first direction of the upper second region. The lower maximum width is greater than the upper maximum width. A density of fixed charges during depletion is higher in the lower second region than in the upper second region. According to the configuration of the first aspect, the density of fixed charges during depletion is higher in the lower second region than in the upper second region. Therefore, to the extent that the density of fixed charges in the lower second region is higher, the progression of the depletion layer into the voltage