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US-20260129972-A1 - DISPLAY PANEL AND ELECTRONIC DEVICE INCLUDING THE SAME

US20260129972A1US 20260129972 A1US20260129972 A1US 20260129972A1US-20260129972-A1

Abstract

A display panel and an electronic device are provided. The display panel includes a substrate, an unevenness layer on the substrate, and a transistor including a gate electrode and a semiconductor layer on the unevenness layer. At least one of a surface of the unevenness layer or a surface of the semiconductor layer includes unevenness.

Inventors

  • Sewan Son
  • Hyeri Cho
  • Hyunil KANG
  • Kyunghae PARK
  • Kihwan SEOK
  • Jinsung An
  • Minwoo Woo
  • Seunghyun Lee
  • Wangwoo Lee
  • Jiseon Lee

Assignees

  • SAMSUNG DISPLAY CO., LTD.

Dates

Publication Date
20260507
Application Date
20251027
Priority Date
20241025

Claims (20)

  1. 1 . A display panel comprising: a substrate; an unevenness layer on the substrate; and a transistor comprising a gate electrode and a semiconductor layer on the unevenness layer, wherein at least one of a surface of the unevenness layer or a surface of the semiconductor layer comprises unevenness.
  2. 2 . The display panel of claim 1 , further comprising a light-emitting diode, wherein the transistor comprises a driving transistor configured to drive the light-emitting diode.
  3. 3 . The display panel of claim 1 , wherein an uneven portion of the surface of the semiconductor layer overlaps the gate electrode in a plan view of the display panel.
  4. 4 . The display panel of claim 1 , wherein the semiconductor layer comprises a first surface facing the gate electrode and a second surface opposite the first surface, and wherein the first surface and the second surface have irregular topologies.
  5. 5 . The display panel of claim 1 , wherein the unevenness layer is connected to a source region of the semiconductor layer.
  6. 6 . The display panel of claim 5 , wherein the unevenness layer is directly connected to the source region of the semiconductor layer.
  7. 7 . The display panel of claim 1 , wherein, in a plan view, a channel region of the semiconductor layer is aligned with an uneven region of the unevenness layer.
  8. 8 . The display panel of claim 1 , wherein the unevenness layer comprises polysilicon.
  9. 9 . The display panel of claim 1 , wherein the semiconductor layer comprises an oxide semiconductor layer.
  10. 10 . The display panel of claim 1 , wherein the unevenness layer comprises an inorganic insulating layer between the substrate and the semiconductor layer.
  11. 11 . An electronic device comprising: a display panel; and a processor configured to control the display panel to display an image, wherein the display panel comprises: a substrate; an unevenness layer on the substrate; and a transistor comprising a gate electrode and a semiconductor layer on the unevenness layer, wherein at least one of a surface of the unevenness layer or a surface of the semiconductor layer comprises unevenness.
  12. 12 . The electronic device of claim 11 , wherein the display panel further comprises a light-emitting diode, wherein the transistor comprises a driving transistor configured to drive the light-emitting diode.
  13. 13 . The electronic device of claim 11 , wherein an uneven portion of the surface of the semiconductor layer overlaps the gate electrode in a plan view of the display panel.
  14. 14 . The electronic device of claim 11 , wherein the semiconductor layer comprises a first surface facing the gate electrode and a second surface opposite the first surface, and wherein the first surface and the second surface have a irregular topologies.
  15. 15 . The electronic device of claim 11 , wherein the unevenness layer is connected to a source region of the semiconductor layer.
  16. 16 . The electronic device of claim 15 , wherein the unevenness layer is directly connected to the source region of the semiconductor layer.
  17. 17 . The electronic device of claim 11 , wherein, in a plan view, a channel region of the semiconductor layer is aligned with an uneven region of the unevenness layer.
  18. 18 . The electronic device of claim 11 , wherein the unevenness layer comprises polysilicon.
  19. 19 . The electronic device of claim 11 , wherein the semiconductor layer comprises an oxide semiconductor layer.
  20. 20 . The electronic device of claim 11 , wherein the unevenness layer comprises an inorganic insulating layer between the substrate and the semiconductor layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application is based on and claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2024-0147866, filed on Oct. 25, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety. BACKGROUND 1. Field One or more embodiments relate to an electronic device, and more particularly, to a display panel included in the electronic device. 2. Description of the Related Art Mobility-based electronic devices have been widely used. In addition to compact electronic devices such as mobile phones, tablet personal computers (PCs) have recently become widely used as portable electronic devices. Such a mobile electronic device includes a display panel to provide a user with visual information, such as images or videos, and to support various functions. Recently, as other components for driving display panels have become smaller, the proportion of display panels in electronic devices has been gradually increasing. Additionally, bendable structures have been developed that allow a flat-panel display to be bent to a certain angle. SUMMARY According to an aspect of the disclosure, a display panel includes a substrate, an unevenness layer on the substrate, and a transistor including a gate electrode and a semiconductor layer on the unevenness layer, wherein at least one of a surface of the unevenness layer or a surface of the semiconductor layer includes unevenness. According to another aspect of the disclosure, an electronic device may include the display panel and a lower cover forming an outer appearance of the display panel and having an opening exposing a portion of the display panel. According to another aspect of the disclosure, an electronic device may include: a display panel including a light-emitting diode; a field-effect transistor configured to drive the light-emitting diode and including a source electrode, a drain electrode, and a gate electrode; a polysilicon layer below the source electrode, the drain electrode, and the gate electrode, and directly connected to the source electrode; an oxide semiconductor layer between the source electrode and the polysilicon layer, and contacting the source electrode and the polysilicon layer; and a processor configured to control the display panel to display an image, wherein at least one of a surface of the polysilicon layer or a surface of the oxide semiconductor layer includes unevenness. BRIEF DESCRIPTION OF DRAWINGS The above and other aspects of the disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which: FIG. 1 is a perspective view schematically illustrating an electronic device according to one or more embodiments; FIG. 2 is an exploded perspective view of the electronic device of FIG. 1; FIG. 3 is a block diagram schematically illustrating the electronic device of FIG. 1; FIG. 4 is a plan view schematically illustrating a display panel according to one or more embodiments; FIG. 5 is a side view schematically illustrating the display panel of FIG. 4; FIG. 6 is a plan view schematically illustrating the display panel of FIG. 4; FIG. 7 is an equivalent circuit diagram of a pixel in a display area of the display panel of FIG. 6; FIG. 8 is a layout diagram schematically showing positions of transistors, capacitors, and the like in pixels in a display area of the display panel of FIG. 6; FIG. 9 is a layout diagram schematically showing positions of a first transistor, a second connection electrode, and an unevenness area in the pixels in the display area of the display panel of FIG. 8; FIG. 10 is a cross-sectional view schematically illustrating a cross-section taken along line B-B′ of FIG. 6; FIG. 11 is an enlarged cross-sectional view illustrating region F of FIG. 10; FIG. 12A is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 12B is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 13A is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 13B is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 14A is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 14B is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 15A is a cross-sectional view schematically illustrating a portion of a display area of a display panel, according to one or more embodiments; FIG. 15B is a cross-sectional view schematically illustrating a portion of a display area of a di