US-20260130029-A1 - DISPLAY PANEL AND DISPLAY APPARATUS

US20260130029A1US 20260130029 A1US20260130029 A1US 20260130029A1US-20260130029-A1

Abstract

The present application provides a display panel and a display apparatus. The display panel comprises a plurality of pixel circuits, each of which comprises a plurality of transistors. The display panel further comprises a substrate, a first organic layer, and a first metal layer. The first organic layer is disposed on one side of the substrate, the first metal layer is disposed on the side of the first organic layer away from the substrate, the first metal layer comprises a first conductor portion, and orthographic projections of the first conductor portion and at least one of the transistors in the pixel circuit on the substrate overlap. The first conductor portion comprises a first opening, and an orthographic projection of the first opening on the substrate overlaps at least partially with an orthographic projection of the first organic layer on the substrate.

Inventors

Bo Yang
Zhenyu JIA

Assignees

TIANMA ADVANCED DISPLAY TECHNOLOGY INSTITUTE (XIAMEN) CO., LTD.

Dates

Publication Date: 20260507
Application Date: 20250326
Priority Date: 20241101

Claims (20)

1 . A display panel comprising a plurality of pixel circuits which comprise a plurality of transistors, the display panel further comprising: a substrate; a first organic layer disposed on a side of the substrate; and a first metal layer disposed on a side of the first organic layer away from the substrate, the first metal layer comprising a first conductor portion, the first conductor portion on the substrate overlapping at least partially with an orthographic projection of at least one of the transistors of the pixel circuits on the substrate, wherein the first conductor portion comprises first openings, orthographic projections of the first openings on the substrate overlapping at least partially with an orthographic projection of the first organic layer on the substrate.
2 . The display panel according to claim 1 , wherein orthographic projections of at least part of the first openings on the substrate overlap at least partially with orthographic projections of the transistors in the pixel circuits on the substrate; and/or the orthographic projections of at least part of the first openings on the substrate are located outside an orthographic projection of any of the transistors in the pixel circuits on the substrate.
3 . The display panel according to claim 2 , wherein the first openings comprise a first type of openings and a second type of openings, and the size of the first type of openings is greater than that of the second type of openings.
4 . The display panel according to claim 3 , wherein on a plane perpendicular to a plane where the display panel is located, the first type of openings do not overlap with the pixel circuits; and on the plane perpendicular to the plane where the display panel is located, at least part of the second type of openings overlap with the pixel circuits; or, orthographic projections of the first type of openings on the substrate are each located between orthographic projections of adjacent ones of the pixel circuits on the substrate; or, adjacent ones of the pixel circuits jointly form repeat circuit groups arranged repeatedly, wherein adjacent ones of the repeat circuit groups are spaced apart to form spacer regions, and the first type of openings are located in the spacer regions.
5 . The display panel according to claim 3 , further comprising shift register units located between adjacent ones of the pixel circuits, wherein orthographic projections of the shift register units on the substrate overlap at least partially with orthographic projections of the first type of openings on the substrate; and/or orthographic projections of the shift register units on the substrate overlap at least partially with orthographic projections of the second type of openings on the substrate.
6 . The display panel according to claim 1 , wherein the first organic layer comprises exhaust holes, and orthographic projections of the first openings overlap at least partially with orthographic projections of the exhaust holes on the substrate.
7 . The display panel according to claim 6 , wherein the orthographic projections of the exhaust holes on the substrate are located within the orthographic projections of the first openings on the substrate, and orthographic projection areas of the exhaust holes on the substrate are less than that of the first openings on the substrate.
8 . The display panel according to claim 1 , further comprising a second metal layer disposed on a side of the substrate, wherein the second metal layer comprises a second conductor portion, an orthographic projection of the second conductor portion on the substrate overlapping at least partially with orthographic projections of at least part of the first openings on the substrate.
9 . The display panel according to claim 8 , further comprising a first active layer disposed on a side of the second metal layer facing the substrate, wherein the first active layer comprises a first active structure comprising first exposed portions, orthographic projections of the first exposed portions on the substrate are located within the first openings, and the orthographic projection of the second conductor portion on the substrate overlaps at least partially with the orthographic projections of the first exposed portions on the substrate.
10 . The display panel according to claim 9 , wherein the second metal layer is located on the side of the first metal layer facing the substrate, the display panel further comprises a second active layer disposed between the second metal layer and the first metal layer, the second active layer comprising a second active structure, and an orthographic projection of the second active structure on the substrate is located outside the orthographic projections of the first openings on the substrate.
11 . The display panel according to claim 9 , wherein the second metal layer is disposed on the side of the first metal layer away from the substrate.
12 . The display panel according to claim 11 , further comprising a second active layer disposed between the first metal layer and the first active layer, wherein the second active layer comprises a second active structure comprising second exposed portions, orthographic projections of the second exposed portions on the substrate are located within the first openings, and the orthographic projection of the second conductor portion on the substrate overlaps at least partially with the orthographic projections of the second exposed portions on the substrate.
13 . The display panel according to claim 11 , wherein orthographic projections of first openings overlapping at least partially with the first active structure overlap at least partially with the orthographic projection of the second conductor portion on the substrate.
14 . The display panel according to claim 1 , further comprising a second metal layer disposed on a side of the first metal layer away from the substrate, wherein the second metal layer comprises a second conductor portion comprising a third type of openings and a fourth type of openings, and the size of the third type of openings is greater than that of the fourth type of openings.
15 . The display panel according to claim 14 , wherein the pixel circuits each comprise a pulse amplitude modulation circuit and a pulse width modulation circuit, the pulse amplitude modulation circuit being configured to control an amplitude of a driving current based on applied pulse amplitude modulation data, and the pulse width modulation circuit being configured to control a pulse width of the driving current; the pulse width modulation circuit comprises a first power terminal configured for providing a first power voltage, and the first conductor portion transmits the first power voltage; and the pulse amplitude modulation circuit comprises a second power terminal configured for providing a second power voltage, and the second conductor portion transmits the second power voltage.
16 . The display panel according to claim 14 , wherein an orthographic projection of one of the third type of openings on the substrate is located between orthographic projections of two of the pixel circuits adjacent to the one of the third type of openings on the substrate; the second conductor portion comprises a first pad and a second pad that are insulated, the second pad being connected to the pixel circuits; and the first pad comprises the fourth type of openings, or the second pad comprises the fourth type of openings.
17 . The display panel according to claim 16 , wherein the size of the fourth type of openings on the first pad is greater than that of the fourth type of openings on the second pad; the first pad comprises the fourth type of ring-shaped openings, and the second pad comprises the fourth type of ring-shaped openings, and wherein the third type of openings are disposed on the first pad and spaced apart from the fourth type of ring-shaped openings.
18 . The display panel according to claim 14 , wherein the first openings comprise the first type of openings and the second type of openings, and the size of the first type of openings is greater than that of the second type of openings; on the plane perpendicular to the plane where the display panel is located, the first type of openings do not overlap with the pixel circuits; on the plane perpendicular to the plane where the display panel is located, at least part of the second type of openings overlap with the pixel circuits; and on the plane perpendicular to the plane where the display panel is located, at least part of the second type of openings do not overlap with the fourth type of openings, and/or at least part of the first type of openings do not overlap with the third type of openings.
19 . The display panel according to claim 18 , wherein orthographic projections of part of the second type of openings on the substrate are located between orthographic projections of adjacent ones of the pixel circuits on the substrate, and the orthographic projections of openings of the second type on the substrate overlap at least partially with an orthographic projection of one of the third type of openings on the substrate; and/or orthographic projections of part of the fourth type of openings on the substrate are located between orthographic projections of adjacent ones of the pixel circuits on the substrate, and the orthographic projections of openings of the fourth type on the substrate overlap at least partially with an orthographic projection of one of the first type of openings on the substrate.
20 . A display apparatus, comprising a display panel comprising a plurality of pixel circuits which comprise a plurality of transistors, the display panel further comprising: a substrate; a first organic layer disposed on a side of the substrate; and a first metal layer disposed on a side of the first organic layer away from the substrate, the first metal layer comprising a first conductor portion, the first conductor portion on the substrate overlapping at least partially with an orthographic projection of at least one of the transistors of the pixel circuits on the substrate, wherein the first conductor portion comprises first openings, orthographic projections of the first openings on the substrate overlapping at least partially with an orthographic projection of the first organic layer on the substrate.

Description

CROSS REFERENCE TO RELATED APPLICATION The present application claims priority to Chinese Patent Application No. 202411553836.4 filed on Nov. 1, 2024, and titled “DISPLAY PANEL AND DISPLAY APPARATUS”, which is incorporated herein by reference in its entirety. TECHNICAL FIELD The present application relates to the technical field of display devices, in particular to a display panel and a display apparatus. BACKGROUND With the development of science and technology, the field of display panels has made a tremendous progress and achieved diversified development. On this basis, people's requirements for display panels are increasing day by day. How to improve the reliability of display panels while meeting performance needs has become one of the research directions for manufacturers. SUMMARY Embodiments of the present application provide a display panel and a display apparatus to improve the reliability of the display panel. In a first aspect, embodiments of the present application provides a display panel, the display panel includes pixel circuits which include a plurality of transistors; the display panel further includes a substrate, a first organic layer, and a first metal layer; the first organic layer is disposed on one side of the substrate, the first metal layer is disposed on the side of the first organic layer away from the substrate, the first metal layer includes a first conductor portion, and orthographic projections of the first conductor portion and at least one of the transistors in the pixel circuit on the substrate overlap. The first conductor portion includes a first opening, and an orthographic projection of the first opening on the substrate overlaps at least partially with an orthographic projection of the first organic layer on the substrate. In a second aspect, embodiments of the present application provide a display apparatus including a display panel, the display panel includes pixel circuits which include a plurality of transistors; the display panel further includes a substrate, a first organic layer, and a first metal layer; the first organic layer is disposed on one side of the substrate, the first metal layer is disposed on the side of the first organic layer away from the substrate, the first metal layer includes a first conductor portion, and orthographic projections of the first conductor portion and at least one of the transistors in the pixel circuit on the substrate overlap. The first conductor portion includes a first opening, and an orthographic projection of the first opening on the substrate overlaps at least partially with an orthographic projection of the first organic layer on the substrate. BRIEF DESCRIPTION OF THE DRAWINGS In order to explain the technical solutions of the embodiments of the present application more clearly, the accompanying drawings required for use in the embodiments of the present application will be briefly introduced below. Those of ordinary skill in the art can derive other drawings based on the accompanying drawings without any creative effort. FIG. 1 is a cross-sectional structural view of a display panel provided in an embodiment of the present application; FIG. 2 is a cross-sectional structural view of a display panel provided in an embodiment of the present application in another region; FIG. 3 is a simple arrangement view of pixel circuits provided in an embodiment of the present application; FIG. 4A and FIG. 4B are simple views of two types of pixel circuits in a display panel provided in an embodiment of the present application; FIG. 5 is a cross-sectional structural view of another display panel provided in an embodiment of the present application; FIG. 6A and FIG. 6B are schematic structural views of a first metal layer in another display panel provided in an embodiment of the present application; FIG. 7 is a simple arrangement view of circuits in another display panel provided in an embodiment of the present application; FIG. 8 is a cross-sectional structural view of still another display panel provided in an embodiment of the present application; FIG. 9 is a cross-sectional structural view of still another display panel provided in an embodiment of the present application; FIG. 10 is a schematic structural view of partial pixel arrangement of still another display panel provided in an embodiment of the present application; FIG. 11 is a cross-sectional structural view of still another display panel provided in an embodiment of the present application; FIG. 12 is a cross-sectional structural view of still another display panel provided in an embodiment of the present application; FIG. 13 is a cross-sectional structural view of still another display panel provided in an embodiment of the present application; FIG. 14 is a schematic structural view of a second metal layer in still another display panel provided in an embodiment of the present application; FIG. 15 is a schematic view showing a positional relationship between a first metal