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US-20260130031-A1 - DISPLAY DEVICE

US20260130031A1US 20260130031 A1US20260130031 A1US 20260130031A1US-20260130031-A1

Abstract

A display device includes a substrate, first chip connection line structures, light emitting elements, a first insulating layer, a failed microchip, second chip connection line structures, and a repair microchip. The first chip connection line structures are located above the substrate and extends outward from a chip placement area. The first insulating layer is located above the substrate and laterally surrounds the failed microchip. The failed microchip is at least partially connected to the first chip connection line structures. The second chip connection line structures are located above the first insulating layer. At least a part of the second chip connection line structures is electrically connected to the first chip connection line structures. The repair microchip is located on the first insulating layer. The repair microchip at least partially overlaps with the failed microchip and is electrically connected to the light emitting elements through the second chip connection line structures.

Inventors

  • Yung-Da CHEN
  • Yu Chun Yen
  • Wen-Tai Chen
  • Yu-Sheng Huang
  • Chien-sen Weng

Assignees

  • AUO Corporation

Dates

Publication Date
20260507
Application Date
20250603
Priority Date
20241101

Claims (16)

  1. 1 . A display device, comprising: a substrate; a plurality of first chip connection line structures, located above the substrate and extending outward from a chip placement area; a plurality of light emitting elements, respectively disposed in a plurality of pixel areas around the chip placement area; a first insulating layer, located above the substrate; a failed microchip, located in the chip placement area, wherein the first insulating layer laterally surrounds the failed microchip, and the failed microchip is at least partially connected to the first chip connection line structures; a plurality of second chip connection line structures, located above the first insulating layer, wherein at least a part of the second chip connection line structures is electrically connected to the first chip connection line structures; and a repair microchip, located above the first insulating layer, wherein the repair microchip is located in the chip placement area and at least partially overlaps with the failed microchip, and the repair microchip is electrically connected to the light emitting elements through the second chip connection line structures.
  2. 2 . The display device according to claim 1 , wherein the first chip connection line structures are located between the first insulating layer and the substrate, the second chip connection line structures are located above the first insulating layer, and the second chip connection line structures are respectively filled into a plurality of first openings in the first insulating layer to be connected to the first chip connection structures.
  3. 3 . The display device according to claim 2 , further comprising: a second insulating layer, located above the first insulating layer, wherein the light emitting elements are located above the second insulating layer, and the second chip connection line structures are located between the first insulating layer and the second insulating layer; and a plurality of signal output structures, located above the second insulating layer, wherein the light emitting elements are respectively electrically connected to the signal output structures, and the signal output structures are respectively filled into a plurality of second openings in the second insulating layer to be connected to the second chip connection structures.
  4. 4 . The display device according to claim 1 , further comprising: a second insulating layer, located above the first insulating layer and laterally surrounding the repair microchip, wherein the second chip connection line structures are located above the second insulating layer.
  5. 5 . The display device according to claim 1 , wherein at least one of the first chip connection line structures is cut to have a first part and a second part separated from each other, wherein the failed microchip is electrically connected to the first part, and at least one of the second chip connection line structures is electrically connected to the second part.
  6. 6 . The display device according to claim 1 , wherein the failed microchip comprises a plurality of first chip pads, and the repair microchip comprises a plurality of second chip pads, wherein the first chip pads are located on a side of the failed microchip close to the substrate, and the second chip pads are located on a side of the repair microchip close to the substrate.
  7. 7 . The display device according to claim 1 , wherein the failed microchip comprises a plurality of first chip pads, and the repair microchip comprises a plurality of second chip pads, wherein the first chip pads are located on a side of the failed microchip facing away from the substrate, and the second chip pads are located on a side of the repair microchip facing away from the substrate.
  8. 8 . The display device according to claim 1 , further comprising: a plurality of signal input structures, extending outward from the chip placement area, wherein the signal input structures and the first chip connection line structures are located between the first insulating layer and the substrate; a second insulating layer, located above the first insulating layer and the second chip connection line structures, wherein the second insulating layer laterally surrounds the repair microchip; a plurality of bridging structures, wherein the bridging structures and the second chip connection line structures are located between the first insulating layer and the second insulating layer, and the repair microchip is electrically connected to the signal input structures through the bridging structures; and a plurality of signal output structures, located above the second insulating layer, wherein the light emitting elements are respectively electrically connected to the signal output structures, and the repair microchip is electrically connected to the signal output structures through the second chip connection line structures.
  9. 9 . The display device according to claim 1 , further comprising: a second insulating layer, located above the first insulating layer, wherein the second chip connection line structures are located above the second insulating layer; a plurality of signal input structures, extending outward from the chip placement area, wherein the signal input structures and the first chip connection line structures are located between the first insulating layer and the second insulating layer; and a plurality of bridging structures, located above the second insulating layer, wherein the repair microchip is electrically connected to the signal input structures through the bridging structures.
  10. 10 . The display device according to claim 1 , wherein a part of the first chip connection line structures is located between the repair microchip and the failed microchip.
  11. 11 . A display device, comprising: a substrate; a plurality of light emitting elements, respectively disposed in a plurality of pixel areas around a chip placement area; a first insulating layer, located above the substrate; a first microchip, located in the chip placement area, wherein the first insulating layer laterally surrounds the first microchip; and a second microchip, located above the first insulating layer, wherein the second microchip is located in the chip placement area and at least partially overlaps with the first microchip, and the second microchip is electrically connected to the light emitting elements; and a first chip connection line structure, being cut to have a first part and a second part separated from each other, wherein the first microchip is electrically connected to the first part, and the second microchip is electrically connected to the second part.
  12. 12 . The display device according to claim 11 , wherein the first chip connection line structure is partially located between the first microchip and the second microchip.
  13. 13 . The display device according to claim 11 , further comprising: a second insulating layer, located above the first insulating layer, wherein the first chip connection line structure is located between the first insulating layer and the second insulating layer; a second chip connection line structure, located above the second insulating layer, wherein the second chip connection line structure is connected to the second part through a first opening in the second insulating layer.
  14. 14 . The display device according to claim 11 , further comprising: a second insulating layer, located above the first insulating layer, wherein the first chip connection line structure is located between the first insulating layer and the substrate; a second chip connection line structure, located above the first insulating layer, wherein the second chip connection line structure is connected to the second part through a first opening in the first insulating layer.
  15. 15 . The display device according to claim 11 , wherein the first microchip comprises a plurality of first chip pads, and the second microchip comprises a plurality of second chip pads, wherein the first chip pads are located on a side of the first microchip close to the substrate, and the second chip pads are located on a side of the second microchip close to the substrate.
  16. 16 . The display device according to claim 11 , wherein the first microchip comprises a plurality of first chip pads, and the second microchip comprises a plurality of second chip pads, wherein the first chip pads are located on a side of the first microchip facing away from the substrate, and the second chip pads are located on a side of the second microchip facing away from the substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims the priority benefit of Taiwan application serial no. 113141990, filed on Nov. 1, 2024. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification. BACKGROUND Technical Field The disclosure relates to a display device, and more particularly to a display device including a repair microchip. Description of Related Art The micro light emitting diode (μLED) display panel is a display technology composed of tens of thousands of micro light emitting diodes. The micro light emitting diodes serve as light sources for pixels and have higher brightness, lower power consumption, and longer lifespan than traditional organic light emitting diode display panels or liquid crystal display panels. In the micro light emitting diode display panel, the driving manner of the micro light emitting diodes is a key challenge because each micro light emitting diode requires precise signal control. Using microchip technology, microcontroller chips may be disposed in a display area of the display panel. The microchips directly provide signals to the micro light emitting diodes to drive and control the pixels. This technology greatly improves the precision and efficiency of signal transmission, while reducing the layout complexity of a driving circuit, which is conducive to the implementation of miniaturization and a high-resolution display panel. SUMMARY The disclosure provides a display device, which may repair a failed microchip. At least one embodiment of the disclosure provides a display device, which includes a substrate, multiple first chip connection line structures, multiple light emitting elements, a first insulating layer, a failed microchip, multiple second chip connection line structures, and a repair microchip. The first chip connection line structures are located above the substrate and extend outward from a chip placement area. The light emitting elements are respectively disposed in multiple pixel areas. The first insulating layer is located above the substrate. The failed microchip is located in the chip placement area. The first insulating layer laterally surrounds the failed microchip, and the failed microchip is at least partially connected to the first chip connection line structures. The second chip connection line structures are located above the first insulating layer, and at least a part of the second chip connection line structures is electrically connected to the first chip connection line structures. The repair microchip is located above the first insulating layer. The repair microchip is located in the chip placement area and at least partially overlaps with the failed microchip. The repair microchip is electrically connected to the light emitting elements through the second chip connection line structures. At least one embodiment of the disclosure provides a display device, which includes a substrate, multiple light emitting elements, a first insulating layer, a first microchip, a second microchip, and a first chip connection line structure. The light emitting elements are respectively disposed in multiple pixel areas around a chip placement area. The first insulating layer is located above the substrate. The first microchip is located in the chip placement area. The first insulating layer laterally surrounds the first microchip. The second microchip is located above the first insulating layer. The second microchip is located in the chip placement area and at least partially overlaps with the first microchip. The second microchip is electrically connected to the light emitting elements. The first chip connection line structure is cut to have a first part and a second part separated from each other. The first microchip is electrically connected to the first part, and the second microchip is electrically connected to the second part. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A, FIG. 2A, FIG. 3A, FIG. 4A, FIG. 5A, and FIG. 6A are top schematic views of various stages of manufacturing a display device according to an embodiment of the disclosure. FIG. 1B, FIG. 2B, FIG. 3B, FIG. 4B, FIG. 5B, and FIG. 6B are respectively cross-sectional schematic views taken along a line A-A′ and a line B-B′ of FIG. 1A, FIG. 2A, FIG. 3A, FIG. 4A, FIG. 5A, and FIG. 6A. FIG. 7A, FIG. 8A, and FIG. 9A are top schematic views of various stages of manufacturing a display device according to an embodiment of the disclosure. FIG. 7B, FIG. 8B, and FIG. 9B are respectively cross-sectional schematic views taken along a line A-A′ and a line B-B′ of FIG. 7A, FIG. 8A, and FIG. 9A. FIG. 10A, FIG. 11A, FIG. 12A, FIG. 13A, FIG. 14A, and FIG. 15A are top schematic views of various stages of manufacturing a display device according to an embodiment of the disclosure. FIG. 10B, FIG. 11B, FIG. 12B, FIG. 13B, FIG. 14B, and FIG. 15B are respectively cross-sectional schematic views taken along a line A-A′ and a line