US-20260130048-A1 - DISPLAY PANEL, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING DISPLAY PANEL

Abstract

A display panel includes a pixel circuit arranged on a substrate and including a thin-film transistor, a capacitor, and a double contact hole, and a light-emitting element electrically connected to the pixel circuit, wherein the double contact hole includes a lower contact hole defined in a first insulating layer, a lower conductive layer arranged on a top surface of the first insulating layer and inside the lower contact hole, an inorganic material filled in a recess provided in the lower conductive layer by the lower contact hole, an intermediate conductive layer arranged on the lower conductive layer and the inorganic material, an upper contact hole defined in a second insulating layer on the first insulating layer, and an upper conductive layer arranged on a top surface of the second insulating layer and inside the upper contact hole and connected to the intermediate conductive layer.

Inventors

• Nguyen Thanh Tien
• Doona Kim
• Hanbit Kim
• Sungwook WOO
• Dokyeong Lee
• Myounggeun Cha
• Sanggun Choi

Assignees

• SAMSUNG DISPLAY CO., LTD.

Dates

Publication Date

20260507

Application Date

20251030

Priority Date

20241105

Claims (20)

1. 1 . A display panel comprising: a substrate; a pixel circuit on the substrate and comprising: at least one thin-film transistor; at least one capacitor; and at least one double contact hole; and a light-emitting element electrically connected to the pixel circuit, wherein the double contact hole comprises: a lower contact hole defined in a first insulating layer; a lower conductive layer on a top surface of the first insulating layer and inside the lower contact hole; an inorganic material filled in a recess provided in the lower conductive layer by the lower contact hole; an intermediate conductive layer on the lower conductive layer and the inorganic material; an upper contact hole defined in a second insulating layer on the first insulating layer; and an upper conductive layer on a top surface of the second insulating layer and inside the upper contact hole and connected to the intermediate conductive layer.
2. 2 . The display panel of claim 1 , wherein the inorganic material comprises agglomerated nanoparticles of a metal oxide and/or a metal.
3. 3 . The display panel of claim 1 , wherein the inorganic material comprises at least one material selected from among BaTiO 3 , BaSO 3 , BaSO 4 , Ba(NO 3 ) 2 , TiO 2 , SiO 2 , and ZnO.
4. 4 . The display panel of claim 1 , wherein the inorganic material comprises at least one material selected from among silver, gold, platinum, and palladium.
5. 5 . The display panel of claim 1 , wherein the upper contact hole overlaps the lower contact hole.
6. 6 . The display panel of claim 1 , wherein the double contact hole further comprises a protective film along a shape of the lower conductive layer inside the recess and a buffer film on the protective film.
7. 7 . The display panel of claim 6 , wherein the buffer film comprises a material different from the inorganic material.
8. 8 . The display panel of claim 1 , wherein the at least one thin-film transistor comprises a first thin-film transistor and a second thin-film transistor, and the at least one double contact hole comprises a first double contact hole and a second double contact hole, and wherein the first double contact hole connects a semiconductor layer of the first thin-film transistor to a pixel electrode of the light-emitting element.
9. 9 . The display panel of claim 8 , wherein the at least one capacitor comprises a first capacitor and a second capacitor, and wherein the second double contact hole connects a semiconductor layer of the second thin-film transistor to the second capacitor.
10. 10 . The display panel of claim 9 , wherein the first capacitor overlaps the first thin-film transistor.
11. 11 . A method, comprising: forming a conductive layer on a substrate; forming a first insulating layer covering the conductive layer, and forming a lower contact hole through which a part of the conductive layer is exposed; forming a lower conductive layer connected to the conductive layer along an inner surface of the lower contact hole from a top surface of the first insulating layer; applying a dispersion solution in which inorganic nanoparticles are dispersed to cover the lower conductive layer on the first insulating layer; and annealing the substrate so that the inorganic nanoparticles are agglomerated and filled in a recess provided in the lower conductive layer by the lower contact hole, wherein the method is a method of manufacturing a display panel.
12. 12 . The method of claim 11 , further comprising cleaning the inorganic nanoparticles arranged outside the recess, after the annealing.
13. 13 . The method of claim 11 , further comprising: forming an intermediate conductive layer over the recess in which the inorganic nanoparticles are filled; forming a second insulating layer covering the intermediate conductive layer on the first insulating layer, and forming an upper contact hole through which a part of the intermediate conductive layer is exposed; and forming an upper conductive layer connected to the intermediate conductive layer along an inner surface of the upper contact hole from a top surface of the second insulating layer.
14. 14 . The method of claim 11 , wherein the inorganic nanoparticles comprise at least one material selected from among BaTiO 3 , BaSO 3 , BaSO 4 , Ba(NO 3 ) 2 , TiO 2 , SiO 2 , and ZnO.
15. 15 . The method of claim 11 , wherein the inorganic nanoparticles comprise at least one material selected from among silver, gold, platinum, and palladium.
16. 16 . The method of claim 11 , further comprising forming a protective film on the lower conductive layer before the applying of the dispersion solution.
17. 17 . The method of claim 16 , further comprising: partially filling an inner area of the lower contact hole by depositing a buffer film, which is thicker than the protective film, on the protective film, utilizing a chemical vapor deposition method; and removing the buffer film formed, on the first insulating layer utilizing a chemical-mechanical polishing process.
18. 18 . The method of claim 17 , wherein the buffer film is formed of a material different from the inorganic nanoparticles.
19. 19 . An electronic device comprising: a display panel comprising a double contact hole; and a cover unit supporting and accommodating the display panel, wherein the double contact hole comprises: a lower contact hole defined in a first insulating layer; a lower conductive layer on a top surface of the first insulating layer and inside the lower contact hole; an inorganic material filled in a recess provided in the lower conductive layer by the lower contact hole; an intermediate conductive layer on the lower conductive layer and the inorganic material; an upper contact hole defined in a second insulating layer on the first insulating layer; and an upper conductive layer on a top surface of the second insulating layer and inside the upper contact hole and connected to the intermediate conductive layer.
20. 20 . The electronic device of claim 19 , wherein the electronic device is a smartphone or a glasses-type display device.

Description

CROSS-REFERENCE TO RELATED APPLICATION The present application claims priority to and the benefit of Korean Patent Application No. 10-2024-0155682, filed on Nov. 5, 2024, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. BACKGROUND 1. Field One or more embodiments of the present disclosure relate to a display panel, an electronic device including the same, and a method of manufacturing the display panel. 2. Description of the Related Art Recently, display apparatuses have been used for various purposes. As the thicknesses and weights of display apparatuses have decreased, their range of applications of display apparatuses has been greatly expanded. A display apparatus generally includes a display panel, and the display panel includes a display element that employs one or more pixels and one or more pixel circuits for controlling electrical signals applied to the display element. A pixel circuit includes one or more thin-film transistors (TFTs), one or more capacitors, and a plurality of wirings. Significant research and development efforts have recently focused on the arrangement of thin-film transistors, capacitors, wirings, and contact holes to achieve high resolution and high integration of the display apparatus. SUMMARY One or more aspects of embodiments of the present disclosure are directed toward a display apparatus including a display panel with high resolution and high integration, an electronic device including the display panel, and a method of manufacturing the display panel. However, aspects of the present disclosure are not limited thereto. Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments. According to one or more embodiments, a display panel includes a substrate, a pixel circuit on (e.g., arranged on) the substrate and including at least one thin-film transistor, at least one capacitor, and at least one double contact hole, and a light-emitting element electrically connected to the pixel circuit, wherein the double contact hole includes a lower contact hole defined in a first insulating layer, a lower conductive layer on (e.g., arranged on) a top surface of the first insulating layer and inside the lower contact hole, an inorganic material filled in a recess provided in the lower conductive layer by the lower contact hole, an intermediate conductive layer on (e.g., arranged on) the lower conductive layer and the inorganic material, an upper contact hole defined in a second insulating layer on the first insulating layer, and an upper conductive layer on (e.g., arranged on) a top surface of the second insulating layer and inside the upper contact hole and connected to the intermediate conductive layer. In one or more embodiments, the inorganic material may be provided by agglomeration of nanoparticles formed of (e.g., including) a metal oxide and/or a metal. For example, the inorganic material may include agglomerated nanoparticles of a metal oxide and/or a metal. In one or more embodiments, the inorganic material may include at least one material selected from among BaTiO3, BaSO3, BaSO4, Ba(NO3)2, TiO2, SiO2, and ZnO. In one or more embodiments, the inorganic material may include at least one material selected from among silver (Ag), gold (Au), platinum (Pt), and palladium (Pd). In one or more embodiments, the upper contact hole may overlap the lower contact hole. In one or more embodiments, the double contact hole may further include a protective film arranged along a shape of the lower conductive layer inside the recess and a buffer film on (e.g., arranged on) the protective film. In one or more embodiments, the buffer film may be formed of a material different from the inorganic material. In one or more embodiments, the at least one thin-film transistor may include a first thin-film transistor and a second thin-film transistor, and the at least one double contact hole may include a first double contact hole and a second double contact hole, wherein the first double contact hole connects a semiconductor layer of the first thin-film transistor to a pixel electrode of the light-emitting element. In one or more embodiments, the at least one capacitor may include a first capacitor and a second capacitor, wherein the second double contact hole connects a semiconductor layer of the second thin-film transistor to the second capacitor. In one or more embodiments, the first capacitor may overlap the first thin-film transistor. According to one or more embodiments, a method of manufacturing a display panel includes forming a conductive layer on a substrate, forming a first insulating layer covering the conductive layer, and forming a lower contact hole through which a part of the conductive layer is exposed, forming a lower conductive layer connected to the conductive layer along an inner surface of th