Search

US-20260130050-A1 - Display Device

US20260130050A1US 20260130050 A1US20260130050 A1US 20260130050A1US-20260130050-A1

Abstract

Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. A second source electrode of the second thin-film transistor and a second gate electrode of the second thin-film transistor overlap each other with an upper interlayer insulation film interposed therebetween so as to form a first storage capacitor.

Inventors

  • Dong-young Kim
  • Kyoung-Nam Lim
  • Yu-Ho Jung

Assignees

  • LG DISPLAY CO., LTD.

Dates

Publication Date
20260507
Application Date
20251229
Priority Date
20171219

Claims (12)

  1. 1 . A display device comprising: a flexible substrate comprising an active area and a bending area; a first thin-film transistor disposed in the active area, the first thin-film transistor comprising a polycrystalline semiconductor layer, a first gate electrode, a first source electrode, and a first drain electrode; a second thin-film transistor disposed in the active area, the second thin-film transistor comprising an oxide semiconductor layer, a second gate electrode, a second source electrode, and a second drain electrode; a first planarization layer covering the first thin-film transistor and the second thin-film transistor in the active area, the first planarization layer extending to the bending area; a connection electrode disposed on the first planarization layer; a second planarization layer disposed on the first planarization layer including the connection electrode in the active area and the bending area; a bank layer disposed on the second planarization layer, the bank layer defining a light emitting region; and a light emitting element disposed on the first planarization layer in the active region, the light emitting element having an anode and a light emitting stack, wherein the light emitting stack includes at least one light emitting layer, and wherein the bank layer includes a light blocking material made of an organic black.
  2. 2 . The display device of claim 1 , wherein the light emitting stack further includes a charge generation layer, a first light emitting stack, and a second light emitting stack, the charge generation layer interposed between the first light emitting stack and the second light emitting stack.
  3. 3 . The display device of claim 1 , further comprising a color filter on the light emitting stack.
  4. 4 . The display device of claim 1 , wherein the connection electrode connects one of the first thin-film transistor and the second thin-film transistor to the anode.
  5. 5 . The display device of claim 1 , further comprising: a signal link between the first planarization layer and the second planarization layer in the bending area.
  6. 6 . The display device of claim 1 , wherein the light blocking material further includes at least one of a color pigment and carbon.
  7. 7 . The display device of claim 1 , wherein the second gate electrode overlaps one of the second source electrode and the second drain electrode.
  8. 8 . The display device of claim 7 , further comprising: a light blocking layer overlapping the oxide semiconductor layer and the second gate electrode, wherein the second gate electrode overlaps one of the second source electrode and the second drain electrode to form a first storage capacitor, wherein the second gate electrode overlaps the light blocking layer to form a second storage capacitor, and wherein the first storage capacitor and the second storage capacitor are connected in parallel.
  9. 9 . The display device of claim 1 , further comprising: a plurality of insulating layers comprising an inorganic insulating material between the first planarization layer and the flexible substrate in the active region; and at least one opening exposing lateral surfaces of the plurality of insulating layers in the bending region, wherein the first planarization layer directly contacts entire lateral surfaces of the plurality of insulating layers exposed by the at least one opening.
  10. 10 . The display device of claim 1 , wherein the first and second source electrodes and the first and second drain electrodes are disposed on a same plane, and the first and second source electrodes and the first and second drain electrodes are made of a same material.
  11. 11 . The display device of claim 1 , wherein the light emitting element further includes a cathode electrode.
  12. 12 . The display device of claim 11 , further comprising: a low potential supply line connected to the cathode electrode; and a high potential supply line disposed adjacent to the low potential supply line, wherein at least one of the low potential supply line and the high potential supply line comprises a mesh shape.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of U.S. patent application Ser. No. 18/813,945 filed on Aug. 23, 2024, which is a continuation of U.S. patent application Ser. No. 18/508,947 filed on Nov. 14, 2023, which is a continuation of U.S. patent application Ser. No. 18/150,113 filed on Jan. 4, 2023, which is a continuation of U.S. patent application Ser. No. 17/735,797 filed May 3, 2022, which is a continuation of U.S. patent application Ser. No. 17/005,061 filed on Aug. 27, 2020, which is a continuation of U.S. patent application Ser. No. 16/210,926 filed on Dec. 5, 2018, which claims priority to Republic of Korea Patent Application No. 10-2017-0175054, filed on Dec. 19, 2017 in the Korean Intellectual Property Office, each of which is incorporated herein by reference in its entirety. BACKGROUND Field of the Technology The present disclosure relates to a display device, and more particularly to a display device that is capable of being driven with low power consumption. Discussion of the Related Art An image display device, which displays various kinds of information on a screen, is a core technology of the information and communication age and is currently being developed with the aims of realizing a thinner and lighter design, greater portability, and higher performance. Hence, flat panel display devices, which overcome the disadvantageously great weight and volume of a cathode ray tube (CRT), are in the spotlight. Examples of flat panel display devices include liquid crystal display (LCD) devices, plasma display panel (PDP) devices, organic light-emitting display (OLED) devices, and electrophoretic display (ED) devices. In recent years, personal electronic devices, to which the above flat panel display devices are applied, have been actively developed in the direction of becoming more portable and/or wearable. These portable or wearable devices require display devices that are capable of being driven with low power consumption. However, it is difficult to manufacture display devices capable of being driven with low power consumption using current technology. SUMMARY Accordingly, the present disclosure is directed to a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art. An object of the present disclosure is to provide a display device that is capable of being driven with low power consumption. Additional advantages, objects, and features of the disclosure will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the disclosure. The objectives and other advantages of the disclosure may be realized and attained by the structure particularly pointed out in the written description and claims thereof, as well as the appended drawings. To achieve these objects and other advantages and in accordance with the purpose of the disclosure, as embodied and broadly described herein, there is provided a display device, in which a first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption, in which at least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device, and in which a second source electrode of the second thin-film transistor and a second gate electrode of the second thin-film transistor overlap each other with an upper interlayer insulation film interposed therebetween so as to form a first storage capacitor. It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are included to provide a further understanding of the disclosure, are incorporated in and constitute a part of this application, illustrate embodiment(s) of the disclosure, and together with the description serve to explain the principle of the disclosure. FIG. 1 is a plan view illustrating a display device according to one embodiment of the present disclosure. FIG. 2 is a cross-sectional view taken along line I-I′ in the display device shown in FIG. 1 according to one embodiment of the present disclosure. FIGS. 3A and 3B are plan views illustrating sub-pixels disposed in the active area shown in FIG. 1 according to one embodiment of the present disclosure. FIGS. 4A and 4B are plan views illustrating embodiments of a signal link disposed in the bending area shown in FIG. 1 acco