US-20260130070-A1 - DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME, DISPLAY APPARATUS

Abstract

A display panel includes a substrate, an insulating layer, a metal layer, a first transparent conductive layer and a second transparent conductive layer. The insulating layer has at least one via hole in each of a second sub-pixel region and a fourth sub-pixel region. The first transparent conductive layer includes a plurality of first transparent conductive lines. The second transparent conductive layer includes a plurality of second transparent conductive lines. A portion of a second transparent conductive line in the fourth sub-pixel region includes a first section and a second section distributed in a second direction and connected to each other; the second direction being an extending direction of the second transparent conductive line; a maximum width of the first section is greater than a width of the second section.

Inventors

• Dongfang Yang
• Yao Huang
• Yue Long
• Zhuoran YAN
• Benlian Wang
• Yuanjie Xu
• Binyan Wang

Assignees

• CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
• BOE TECHNOLOGY GROUP CO., LTD.

Dates

Publication Date

20260507

Application Date

20251014

Claims (20)

1. 1 . A display panel having a display region; the display region including a first region and a second region that are non-overlapping with each other, and the first region including a plurality of sub-pixel regions; the display panel comprising: a substrate; an insulating layer disposed on the substrate; the insulating layer having at least one via hole in a sub-pixel region; a metal layer disposed on a side of the insulating layer away from the substrate; the metal layer covering an inner wall of the at least one via hole; a first transparent conductive layer disposed on a side of the metal layer away from the substrate; wherein the first transparent conductive layer includes a plurality of first transparent conductive lines that are arranged in a first direction and spaced apart from one another; a first transparent conductive line extends from a first sub-pixel region to the second region through a second sub-pixel region, and the first sub-pixel region and the second sub-pixel region are each one of the plurality of sub-pixel regions; and a second transparent conductive layer disposed on a side of the first transparent conductive layer away from the substrate; wherein the second transparent conductive layer includes a plurality of second transparent conductive lines that are arranged in the first direction and spaced apart from one another; a second transparent conductive line extends from a third sub-pixel region to the second region through a fourth sub-pixel region, and the third sub-pixel region and the fourth sub-pixel region are each one of the plurality of sub-pixel regions; wherein the insulating layer has at least one via hole in the fourth sub-pixel region; a portion of the second transparent conductive line in the fourth sub-pixel region includes a first section and a second section that are distributed in a second direction and connected to each other; the second direction being an extending direction of the second transparent conductive line; an orthographic projection of the first section on the substrate overlaps with an orthogonal projection, on the substrate, of at least part of via holes, in the fourth sub-pixel region, of the insulating layer; an orthographic projection of the second section on the substrate is non-overlapping with orthogonal projections, on the substrate, of all via holes, in the fourth sub-pixel region, of the insulating layer; and a maximum width of the first section is greater than a width of the second section.
2. 2 . The display panel according to claim 1 , wherein the insulating layer has at least one via hole in the fourth sub-pixel region; wherein an orthographic projection of the first transparent conductive line on the substrate is non-overlapping with orthogonal projections, on the substrate, of all via holes, in the second sub-pixel region, of the insulating layer; and an orthographic projection of the second transparent conductive line on the substrate overlaps with the orthogonal projection, on the substrate, of at least part of the via holes, in the fourth sub-pixel region, of the insulating layer.
3. 3 . The display panel according to claim 2 , wherein the first transparent conductive layer and the metal layer are adjacent conductive layers.
4. 4 . The display panel according to claim 1 , wherein the orthogonal projection, on the substrate, of at least part of the via holes, in the fourth sub-pixel region, of the insulating layer is located within an orthographic projection of the second transparent conductive line on the substrate.
5. 5 . The display panel according to claim 1 , wherein a maximum width of the second transparent conductive line in the fourth sub-pixel region is greater than a width of the first transparent conductive line in the second sub-pixel region.
6. 6 . The display panel according to claim 1 , wherein the insulating layer has at least one via hole in the second sub-pixel region; the metal layer covers an inner wall of the at least one via hole in the second sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the fourth sub-pixel region; wherein a total overlapping area between an orthographic projection of the first transparent conductive line on the substrate and orthogonal projections, on the substrate, of all via holes, in the second sub-pixel region, of the insulating layer is less than a total overlapping area between an orthographic projection of the second transparent conductive line on the substrate and the orthogonal projections, on the substrate, of all the via holes, in the fourth sub-pixel region, of the insulating layer.
7. 7 . The display panel according to claim 6 , wherein the maximum width of the first section is greater than a width of the first transparent conductive line in the second sub-pixel region; or a maximum width of the second section is equal to the width of the first transparent conductive line in the second sub-pixel region.
8. 8 . The display panel according to claim 6 , wherein the maximum width of the first section is greater than a width of the first transparent conductive line in the second sub-pixel region; a maximum width of the second section is equal to the width of the first transparent conductive line in the second sub-pixel region.
9. 9 . The display panel according to claim 1 , wherein an orthographic projection of the first transparent conductive line on the substrate is non-overlapping with orthographic projections of the plurality of second transparent conductive lines on the substrate.
10. 10 . The display panel according to claim 1 , wherein the plurality of first transparent conductive lines and the plurality of second transparent conductive lines are alternately arranged in the first direction.
11. 11 . The display panel according to claim 1 , wherein a distance, in a direction perpendicular to the substrate, between the second transparent conductive line and the insulating layer is greater than or equal to 4.5 μm.
12. 12 . The display panel according to claim 1 , further comprising: a third transparent conductive layer disposed between the first transparent conductive layer and the second transparent conductive layer; wherein the third transparent conductive layer includes a plurality of third transparent conductive lines that are arranged in the first direction and spaced apart from one another; a third transparent conductive line extends from a fifth sub-pixel region to the second region through a sixth sub-pixel region; an orthographic projection of the third transparent conductive line on the substrate is non-overlapping with orthogonal projections, on the substrate, of all via holes, in the sixth sub-pixel region, of the insulating layer; the fifth sub-pixel region and the sixth sub-pixel region are each one of the plurality of sub-pixel regions; the insulating layer has at least one via hole in the sixth sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the sixth sub-pixel region.
13. 13 . The display panel according to claim 12 , wherein the sixth sub-pixel region and the second sub-pixel region are a same sub-pixel region; in the second sub-pixel region, the orthographic projection of the third transparent conductive line on the substrate overlaps with an orthographic projection of the first transparent conductive line on the substrate.
14. 14 . The display panel according to claim 1 , further comprising: a fourth transparent conductive layer located on the second transparent conductive layer; wherein the fourth transparent conductive layer includes a plurality of fourth transparent conductive lines that are arranged in the first direction and spaced apart from one another; a fourth transparent conductive line extends from a seventh sub-pixel region to the second region through an eighth sub-pixel region, and the seventh sub-pixel region and the eighth sub-pixel region are each one of the plurality of sub-pixel regions; the insulating layer has at least one via hole in the eighth sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the eighth sub-pixel region; wherein an orthographic projection of the fourth transparent conductive line on the substrate is non-overlapping with orthogonal projections, on the substrate, of all via holes, in the eighth sub-pixel region, of the insulating layer; or the orthographic projection of the fourth transparent conductive line on the substrate overlaps with an orthogonal projection, on the substrate, of at least part of the via holes, in the eighth sub-pixel region, of the insulating layer.
15. 15 . The display panel according to claim 1 , further comprising: a first light-emitting device and a second light-emitting device; wherein the first light-emitting device and the second light-emitting device are both located in the second region, the first light-emitting device is coupled to the first transparent conductive line, and the second light-emitting device is coupled to the second transparent conductive line.
16. 16 . The display panel according to claim 1 , wherein the plurality of sub-pixel regions further include a plurality of ninth sub-pixel regions; the display panel further comprises a plurality of third light-emitting devices located in the first region, and each third light-emitting device is coupled in a ninth sub-pixel region.
17. 17 . A display apparatus, comprising: the display panel according to claim 1 ; and a sensor disposed on a non-display side of the display panel; wherein an orthographic projection of the sensor on the display panel overlaps with the second region of the display panel.
18. 18 . The display apparatus according to claim 17 , wherein the orthographic projection of the first transparent conductive line on the substrate is non-overlapping with the orthogonal projections, on the substrate, of all the via holes, in the second sub-pixel region, of the insulating layer; and the orthographic projection of the second transparent conductive line on the substrate overlaps with an orthogonal projection, on the substrate, of at least part of the via holes, in the fourth sub-pixel region, of the insulating layer.
19. 19 . A method of manufacturing a display panel, the display panel having a display region; the display region including a first region and a second region that are non-overlapping with each other, and the first region including a plurality of sub-pixel regions; the method of manufacturing the display panel comprising: forming an insulating layer on a substrate; the insulating layer having at least one via hole in a sub-pixel region; forming a metal layer on a side of the insulating layer away from the substrate; the metal layer covering an inner wall of the at least one via hole; forming a first transparent conductive layer on a side of the metal layer away from the substrate; wherein the first transparent conductive layer includes a plurality of first transparent conductive lines that are arranged in a first direction and spaced apart from one another; a first transparent conductive line extends from a first sub-pixel region to the second region through a second sub-pixel region; the first sub-pixel region and the second sub-pixel region are each one of the plurality of sub-pixel regions; and forming a second transparent conductive layer on a side of the first transparent conductive layer away from the substrate; wherein the second transparent conductive layer includes a plurality of second transparent conductive lines that are arranged in the first direction and spaced apart from one another; a second transparent conductive line extends from a third sub-pixel region to the second region through a fourth sub-pixel region; the third sub-pixel region and the fourth sub-pixel region are each one of the plurality of sub-pixel regions.
20. 20 . The method of manufacturing the display panel according to claim 19 , wherein forming the first transparent conductive layer on the side of the metal layer away from the substrate includes: forming a transparent conductive film on the side of the metal layer away from the substrate; forming a first positive photoresist film on a surface of the transparent conductive film; performing exposure, by using a first mask, and development on the first positive photoresist film to obtain a first photoresist pattern layer, the first mask including a plurality of first linear shielding bars; and removing a portion of the transparent conductive film not protected by the first photoresist pattern layer to obtain the first transparent conductive layer including the plurality of first transparent conductive lines; wherein a first linear shielding bar corresponds to the first transparent conductive line; and forming the second transparent conductive layer on the side of the first transparent conductive layer away from the substrate includes: forming another transparent conductive film on the side of the first transparent conductive layer away from the substrate; forming a second positive photoresist film on a surface of the another transparent conductive film; performing exposure, by using a second mask, and development on the second positive photoresist film to obtain a second photoresist pattern layer, the second mask including a plurality of second linear shielding bars; and removing a portion of the another transparent conductive film not protected by the second photoresist pattern layer to obtain the second transparent conductive layer including the plurality of second transparent conductive lines; wherein a second linear shielding bar corresponds to the second transparent conductive line; wherein a maximum width of the second linear shielding bar corresponding to the fourth sub-pixel region is greater than a width of the first linear shielding bar corresponding to the second sub-pixel region.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of U.S. patent application Ser. No. 18/250,781, filed on Apr. 27, 2023, which claims priority to International Patent Application No. PCT/CN2022/078680, filed on Mar. 1, 2022, which are incorporated herein by reference in their entirety. TECHNICAL FIELD The present disclosure relates to the field of display technologies, and in particular, to a display panel and a method of manufacturing the same, and a display apparatus. BACKGROUND In order to improve a screen-to-body ratio of a display apparatus (e.g., a smart device such as a mobile phone) and maintain an integrity of a screen, a technology of a full display with a camera (FDC) comes into being. However, a display effect in a region where an under-screen camera is located is relatively poor. SUMMARY In an aspect, a display panel is provided. The display panel has a display region. The display region includes a first region and a second region that are non-overlapping with each other. The first region includes a plurality of sub-pixel regions. The display panel includes a substrate, an insulating layer, a metal layer, a first transparent conductive layer and a second transparent conductive layer. The insulating layer is disposed on the substrate and has at least one via hole in a sub-pixel region. The metal layer is disposed on a side of the insulating layer away from the substrate and covers an inner wall of the at least one via hole in the sub-pixel region. The first transparent conductive layer is disposed on a side of the metal layer away from the substrate and includes a plurality of first transparent conductive lines that are arranged in a first direction and spaced apart from one another. A first transparent conductive line extends from a first sub-pixel region to the second region through a second sub-pixel region, and the first sub-pixel region and the second sub-pixel region are each one of the plurality of sub-pixel regions. The insulating layer has at least one via hole in the second sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the second sub-pixel region. The second transparent conductive layer is disposed on a side of the first transparent conductive layer away from the substrate and includes a plurality of second transparent conductive lines that are arranged in the first direction and spaced apart from one another. A second transparent conductive line extends from a third sub-pixel region to the second region through a fourth sub-pixel region. The third sub-pixel region and the fourth sub-pixel region are each one of the plurality of sub-pixel regions. The insulating layer has at least one via hole in the fourth sub-pixel region, and the metal layer covers an inner wall of the at least one via hole in the fourth sub-pixel region. A total overlapping area between an orthographic projection of the first transparent conductive line on the substrate and orthogonal projections, on the substrate, of all via holes, in the second sub-pixel region, of the insulating layer is less than a total overlapping area between an orthographic projection of the second transparent conductive line on the substrate and orthogonal projections, on the substrate, of all via holes, in the fourth sub-pixel region, of the insulating layer. In some embodiments, the orthographic projection of the first transparent conductive line on the substrate is non-overlapping with the orthogonal projections, on the substrate, of all the via holes, in the second sub-pixel region, of the insulating layer. The orthographic projection of the second transparent conductive line on the substrate overlaps with an orthogonal projection, on the substrate, of at least part of the via holes, in the fourth sub-pixel region, of the insulating layer. In some embodiments, an orthogonal projection, on the substrate, of at least part of the via holes, in the fourth sub-pixel region, of the insulating layer is located within the orthographic projection of the second transparent conductive line on the substrate. In some embodiments, a maximum width of the second transparent conductive line in the fourth sub-pixel region is greater than a width of the first transparent conductive line in the second sub-pixel region. In some embodiments, a portion of the second transparent conductive line in the fourth sub-pixel region includes a first section and a second section that are distributed in a second direction and connected to each other. The second direction is an extending direction of the second transparent conductive line. An orthographic projection of the first section on the substrate overlaps with an orthogonal projection, on the substrate, of at least part of the via holes, in the fourth sub-pixel region, of the insulating layer. An orthographic projection of the second section on the substrate is non-overlapping with the orthogonal projections, on the substrate, of all the via h