US-20260130077-A1 - DISPLAY SUBSTRATE AND DISPLAY DEVICE

Abstract

A display substrate including a base substrate and an initialization signal transmission layer and a plurality of sub-pixels arranged on the base substrate. The sub-pixels include a sub-pixel driving circuit, the sub-pixel driving circuit includes a first conductive connection portion, a driving transistor and a storage capacitor. The storage capacitor includes a first electrode plate and a second electrode plate arranged opposite to each other. The initialization signal transmission layer includes a plurality of first transmission portions and a plurality of second transmission portions. A distance between adjacent second transmission portions is greater than or equal to a maximum first width in the second direction of an orthographic projection of one sub-pixel driving circuit on the base substrate.

Inventors

• Jingli Zhang
• Xinyu Wei
• Erlong SONG
• Kai Zhang
• Xiaodong CHU

Assignees

• CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
• BOE TECHNOLOGY GROUP CO., LTD.

Dates

Publication Date

20260507

Application Date

20251229

Claims (20)

1. 1 . A display substrate, comprising: a base substrate, and an initialization signal transmission layer and a plurality of sub-pixels arranged on the base substrate, wherein the sub-pixels include a sub-pixel driving circuit, the sub-pixel driving circuit includes a first conductive connection portion, a driving transistor and a storage capacitor; wherein the storage capacitor includes a first electrode plate and a second electrode plate arranged opposite to each other; the second electrode plate includes a via hole, through which the first conductive connection portion passes and is coupled to a gate of the driving transistor; the first electrode plate includes a first side and a second side arranged opposite to each other along a second direction, a third side and a fourth side arranged opposite to each other along a first direction, and the first direction intersects the second direction; wherein the initialization signal transmission layer includes a plurality of first transmission portions and a plurality of second transmission portions; the plurality of first transmission portions are arranged along a first direction, the first transmission portion includes at least a portion extending along the second direction; the second transmission portion includes at least a portion extending along the first direction, adjacent first transmission portions are coupled through at least one second transmission portion; wherein a distance between adjacent second transmission portions is greater than or equal to a maximum first width in the second direction of an orthographic projection of one sub-pixel driving circuit on the base substrate; and wherein in a sub-pixel driving circuit layout area comprising the second transmission portion, an orthographic projection of the second transmission portion on the base substrate at least partially overlaps an orthographic projection of a corresponding first electrode plate on the base substrate, and at least partially overlap an orthographic projection of a corresponding second electrode plate on the base substrate; the second side is one closer to the second transmission section; along the second direction, a distance between an orthographic projection of the via hole on the substrate and an orthographic projection of the first side on the substrate is less than a distance between the orthographic projection of the via hole on the substrate and an orthographic projection of the second side on the substrate; along the first direction, a distance between the orthographic projection of the via hole on the substrate and an orthographic projection of the third side on the substrate is greater than a distance between the orthographic projection of the via hole on the substrate and an orthographic projection of the fourth side on the substrate.
2. 2 . The display substrate according to claim 1 , wherein the display substrate further comprises a power line and a light-emitting control line, the sub-pixel driving circuit further comprises a fifth transistor, a gate electrode of the fifth transistor is coupled to the light-emitting control line, a first electrode of the fifth transistor is coupled to the power line, and a second electrode of the fifth transistor is coupled to the first electrode of the third transistor; and wherein the orthographic projection of the third side on the base substrate is located between the orthographic projection of the fourth side on the base substrate and an orthographic projection of the light-emitting control line on the base substrate.
3. 3 . The display substrate according to claim 2 , wherein the driving transistor comprises a third active layer, and the orthographic projection of the third side on the base substrate is located between an orthographic projection of the third active layer on the base substrate and the orthographic projection of the light-emitting control line on the base substrate.
4. 4 . The display substrate according to claim 1 , wherein in a sub-pixel driving circuit layout area that does not include the second transmission portion, along the first direction, a distance between the orthographic projection of the via hole on the substrate and the orthographic projection of the third side on the substrate is less than a distance between the orthographic projection of the via hole on the substrate and the orthographic projection of the fourth side on the substrate.
5. 5 . The display substrate according to claim 1 , wherein in a sub-pixel driving circuit layout area that does not include the second transmission portion, along the second direction, a distance between the orthographic projection of the via hole on the substrate and the orthographic projection of the first side on the substrate is less than a distance between the orthographic projection of the via hole on the substrate and the orthographic projection of the second side on the substrate.
6. 6 . The display substrate according to claim 5 , wherein the first electrode plate in the sub-pixel driving circuit layout area including the second transmission section is mirror-symmetrical to the first electrode plate that is adjacent along the second direction in the sub-pixel driving circuit layout area that does not contain the second transmission section.
7. 7 . The display substrate according to claim 1 , wherein the display substrate includes a plurality of data lines, and the data line includes at least a portion extending along the first direction; wherein the sub-pixel driving circuit further includes: a first transistor and a fourth transistor, the first transistor is respectively coupled to a first electrode and a second electrode of the driving transistor, and the fourth transistor is respectively coupled to the first electrode of the driving transistor and a corresponding data line; the first transistor includes a first active layer, and the fourth transistor includes a fourth active layer; and wherein at least part of the orthographic projection of the second transmission portion on the base substrate is located between an orthographic projection of the first active layer on the base substrate and an orthographic projection of the fourth active layer on the base substrate.
8. 8 . The display substrate according to claim 1 , wherein the display substrate further comprises a power supply line; the sub-pixel further includes a light-emitting element; the sub-pixel driving circuit further includes a fifth transistor and a sixth transistor, the fifth transistor is respectively coupled to a first electrode of the driving transistor and a corresponding power supply line, the sixth transistor is respectively coupled to a second electrode of the driving transistor and the light emitting element; the fifth transistor includes a fifth active layer, and the sixth transistor includes a sixth active layer; and wherein at least part of the orthographic projection of the second transmission portion on the base substrate is located between an orthographic projection of the fifth active layer on the base substrate and an orthographic projection of the sixth active layer on the base substrate.
9. 9 . The display substrate according to claim 8 , wherein the plurality of sub-pixels is divided into a plurality of sub-pixel groups, and each sub-pixel group includes a first sub-pixel and a second sub-pixel; wherein both the first sub-pixel and the second sub-pixel include a second conductive portion, and the second conductive portion in the first sub-pixel is coupled to the second conductive portion in the second sub-pixel; wherein the fifth transistor in the first sub-pixel is coupled to the second conductive portion, the fifth transistor in the second sub-pixel is coupled to the second conductive portion, and the second conductive portion in the second sub-pixel is coupled to the corresponding power supply line; and wherein at least part of the second transmission portion is located in a sub-pixel driving circuit layout area in the first sub-pixel, and the orthographic projection of the second transmission portion on the base substrate does not overlap an orthographic projection of the second conductive portion in the first sub-pixel on the base substrate.
10. 10 . The display substrate according to claim 8 , wherein the sub-pixel driving circuit further includes an eighth transistor, the eighth transistor is coupled to the first electrode or the second electrode of the driving transistor, and the eighth transistor is used for resetting the first electrode or the second electrode; and wherein the eighth transistor includes an eighth active layer, at least a portion of the orthographic projection of the second transmission portion on the base substrate and an orthographic projection of the eighth active layer on the base substrate are arranged along the second direction.
11. 11 . The display substrate according to claim 10 , wherein the sub-pixel driving circuit further includes a seventh transistor, the seventh transistor is coupled to the light-emitting element and the seventh transistor is used for resetting the light-emitting element; and wherein the seventh transistor includes a seventh active layer, at least a portion of the orthographic projection of the second transmission portion on the base substrate is located between an orthographic projection of the seventh active layer on the base substrate and the orthographic projection of the eighth active layer on the base substrate.
12. 12 . The display substrate according to claim 1 , wherein the display substrate includes a first initialization signal transmission layer and a second initialization signal transmission layer, and the initialization signal transmission layer is the first initialization signal transmission layer or the second initialization signal transmission layer; or wherein the display substrate includes at least two initialization signal transmission layers, a first one of the at least two initialization signal transmission layers is the first initialization signal transmission layer, and a second one of the at least two initialization signal transmission layers is the second initialization signal transmission layer.
13. 13 . The display substrate according to claim 12 , wherein the display substrate comprises a plurality of sub-pixels, and the sub-pixels include a light-emitting element and a sub-pixel driving circuit; the sub-pixel driving circuit includes a driving transistor, and further includes: a second transistor, wherein the second transistor is respectively coupled to a gate electrode of the driving transistor and the initialization signal transmission layer; a seventh transistor, wherein the seventh transistor is respectively coupled to the light-emitting element and the initialization signal transmission layer.
14. 14 . The display substrate according to claim 12 , wherein the display substrate further comprises a third initialization signal transmission layer; the initialization signal transmission layer is at least one of the first initialization signal transmission layer, the second initialization signal transmission layer and the third initialization signal transmission layer.
15. 15 . The display substrate according to claim 14 , wherein the display substrate comprises a plurality of sub-pixels, and the sub-pixels include a light-emitting element and a sub-pixel driving circuit; the sub-pixel driving circuit includes a driving transistor, and further includes: a second transistor, wherein the second transistor is respectively coupled to a gate electrode of the driving transistor and the first initialization signal transmission layer; a seventh transistor, wherein the seventh transistor is respectively coupled to the light-emitting element and the second initialization signal transmission layer; an eighth transistor, wherein the eighth transistor is respectively coupled to the first electrode of the driving transistor and the third initialization signal transmission layer.
16. 16 . The display substrate according to claim 14 , wherein the display substrate further includes a display area and a peripheral area surrounding the display area, and the display substrate further includes: a first signal line, wherein the first signal line is located in the peripheral area of the display substrate, the first signal line includes at least a portion extending along the first direction, the first signal line is coupled to the first initialization signal transmission layer; the first signal line is made of a second source-drain metal layer, and the first transmission portion included in the first initialization signal transmission layer is made of a first gate metal layer.
17. 17 . The display substrate according to claim 16 , wherein the display substrate further comprises a second signal line, wherein the second signal line is located in the peripheral area of the display substrate, the second signal line includes at least a portion extending along the first direction, an orthographic projection of the first signal line on the base substrate is located between the display area and an orthographic projection of the second signal line on the base substrate, and the second signal line is coupled to the second initialization signal transmission layer; and wherein the second signal line and the first transmission portion included in the second initialization signal transmission layer are both made of a first source-drain metal layer.
18. 18 . The display substrate according to claim 17 , wherein the display substrate further comprises a third signal line, wherein an orthographic projection of the third signal line on the base substrate is located between the orthographic projection of the first signal line on the base substrate and the orthographic projection of the second signal line on the base substrate, the third signal line is coupled to the third initialization signal transmission layer; and wherein the third signal line is made of the first source-drain metal layer, and the third initialization signal transmission layer is made of a third gate metal layer.
19. 19 . A display substrate, comprising: a base substrate, and an initialization signal transmission layer and a plurality of sub-pixels arranged on the base substrate, wherein the sub-pixels include a sub-pixel driving circuit, the sub-pixel driving circuit includes a first conductive connection portion, a first transistor, a driving transistor and a storage capacitor; wherein the first transistor is respectively coupled to a first electrode and a second electrode of the driving transistor; wherein the storage capacitor includes a first electrode plate and a second electrode plate arranged opposite to each other; the second electrode plate includes a via hole, through which the first conductive connection portion passes and is coupled to a gate of the driving transistor; the first electrode plate includes a first side and a second side arranged opposite to each other along a second direction, and a third side and a fourth side arranged opposite to each other along a first direction, and the first direction intersects the second direction; wherein the initialization signal transmission layer includes a plurality of first transmission portions and a plurality of second transmission portions; the plurality of first transmission portions are arranged along a first direction, the first transmission portion includes at least a portion extending along the second direction; the second transmission portion includes at least a portion extending along the first direction, adjacent first transmission portions are coupled through at least one second transmission portion; wherein a distance in the second direction between adjacent second transmission portions is greater than or equal to a maximum first width in the second direction of an orthographic projection of one sub-pixel driving circuit on the base substrate; wherein in a sub-pixel driving circuit layout area comprising the second transmission portion, an orthographic projection of the second transmission portion on the base substrate at least partially overlaps an orthographic projection of a corresponding first electrode plate on the base substrate, and at least partially overlaps an orthographic projection of a corresponding second electrode plate on the base substrate; the second side is one far away from the first transistor; along the second direction, a distance between an orthographic projection of the via hole on the substrate and an orthographic projection of the first side on the substrate is less than a distance between the orthographic projection of the via hole on the substrate and an orthographic projection of the second side on the substrate; along the first direction, a distance between the orthographic projection of the via hole on the substrate and an orthographic projection of the third side on the substrate is greater than a distance between the orthographic projection of the via hole on the substrate and an orthographic projection of the fourth side on the substrate.
20. 20 . A display device comprising the display substrate according to claim 1 .

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application is a continuation of U.S. application Ser. No. 17/907,933 filed on Aug. 29, 2022, which is the U.S. national phase of PCT Application No. PCT/CN2021/119995 filed on Sep. 23, 2021, the disclosures of which are incorporated in their entireties by reference herein. TECHNICAL FIELD The present disclosure relates to the field of display technology, and more particularly to a display substrate and a display device. BACKGROUND As an important medium for human-computer interaction, touch panels are increasingly used in computers, watches, mobile phones and other fields. As the screen size becomes larger and the refresh frequency becomes higher, the loading of the panel is much more, the problem of insufficient charging time is more serious. SUMMARY The present disclosure aims to provide a display substrate and a display device. In order to achieve the objective, the present disclosure provides the following solution. A first aspect of the present disclosure provides a display substrate, including: a base substrate and a plurality of sub-pixels arranged on the base substrate, wherein the sub-pixels includes a sub-pixel driving circuit, an orthographic projection of the sub-pixel driving circuit on the base substrate has a maximum first width along a second direction; the display substrate further includes: an initialization signal transmission layer arranged on the base substrate; wherein the initialization signal transmission layer includes a plurality of first transmission portions and a plurality of second transmission portions; the plurality of first transmission portions are arranged along a first direction, the first transmission portion includes at least a portion extending along the second direction, the second direction intersects the first direction; the second transmission portion includes at least a portion extending along the first direction, adjacent first transmission portions are coupled through at least one second transmission portion; the plurality of first transmission portions include a target transmission portion, and the target transmission portion includes at least a portion extending along the second direction, a second transmission portion located between the target transmission portion and an adjacent previous first transmission portion and a second transmission portion located between the target transmission portion and an adjacent next first transmission portion are staggered by a first distance along the second direction, the first distance is greater than or equal to the first width. Optionally, the display substrate includes a first initialization signal transmission layer and a second initialization signal transmission layer; the initialization signal transmission layer is the first initialization signal transmission layer or the second initialization signal transmission layer; or, the display substrate includes at least two initialization signal transmission layers, a first one of the at least two initialization signal transmission layers is the first initialization signal transmission layer, and a second one of the at least two initialization signal transmission layers is the second initialization signal transmission layer. Optionally, the display substrate further comprises a third initialization signal transmission layer. Optionally, a third one of the at least two initialization signal transmission layers is the third initialization signal transmission layer. Optionally, the display substrate comprises a first initialization signal transmission layer, a second initialization signal transmission layer and a third initialization signal transmission layer; the initialization signal transmission layer is one of the first initialization signal transmission layer, the second initialization signal transmission layer and the third initialization signal transmission layer. Optionally, the plurality of first transmission portions include a non-target transmission portion, a second transmission portion located between the non-target transmission portion and an adjacent previous first transmission portion and a second transmission portion located between the non-target transmission portion and an adjacent next first transmission portion are arranged in a same column along the first direction. Optionally, a second transmission portion in the first initialization signal transmission layer and a second transmission portion in the second initialization signal transmission layer are staggered along the second direction. Optionally, a second transmission portion in the first initialization signal transmission layer and a second transmission portion in the second initialization signal transmission layer are staggered in the second direction; and/or, the second transmission portion in the first initialization signal transmission layer and a second transmission portion in the third initialization signal transmission layer are staggered in the s