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US-20260130091-A1 - DISPLAY DEVICE, DISPLAY SYSTEM INCLUDING DISPLAY DEVICE, AND METHOD OF FABRICATING DISPLAY DEVICE

US20260130091A1US 20260130091 A1US20260130091 A1US 20260130091A1US-20260130091-A1

Abstract

A display device includes: a substrate on which first to third sub-pixels are defined; sidewalls disposed on the substrate; an anode electrode disposed on the substrate to correspond to the first to third sub-pixels; a first emission structure disposed on the anode electrode of the first sub-pixel; a second emission structure disposed on the anode electrode of the second sub-pixel; a third emission structure disposed on the anode electrode of the third sub-pixel; a cathode electrode disposed on the first emission structure, the second emission structure, and the third emission structure; and a capping layer disposed on the cathode electrode. Each of the sidewalls includes: a first sidewall; and a second sidewall disposed on the first sidewall, and having a width greater than a width of the first sidewall. The capping layer does not overlap at least one of the first to third emission structures in a plan view.

Inventors

  • Hee Min Park
  • A Rong KIM
  • Jae Ik Kim
  • Young Min Moon
  • Hee Jun Yang
  • Sa Min LEE
  • Won Je CHO

Assignees

  • SAMSUNG DISPLAY CO., LTD.

Dates

Publication Date
20260507
Application Date
20250730
Priority Date
20241101

Claims (20)

  1. 1 . A display device, comprising: a substrate on which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined; sidewalls disposed on the substrate; an anode electrode disposed on the substrate to correspond to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel; a first emission structure disposed on the anode electrode of the first sub-pixel; a second emission structure disposed on the anode electrode of the second sub-pixel; a third emission structure disposed on the anode electrode of the third sub-pixel; and a cathode electrode disposed on each of the first emission structure, the second emission structure, and the third emission structure, wherein each of the sidewalls comprises: a first sidewall; and a second sidewall disposed on the first sidewall, and having a width greater than a width of the first sidewall.
  2. 2 . The display device according to claim 1 , further comprising a capping layer disposed on the cathode electrode; and a pixel defining layer disposed under the sidewalls, wherein the capping layer does not overlap at least one selected from the first emission structure, the second emission structure, and the third emission structure in a plan view, wherein the pixel defining layer exposes at least a portion of the anode electrode, and wherein the sidewalls are respectively located in areas between the first emission structure, the second emission structure, and the third emission structure.
  3. 3 . The display device according to claim 1 , further comprising a capping layer disposed on the cathode electrode, wherein the capping layer does not overlap at least one selected from the first emission structure, the second emission structure, and the third emission structure in a plan view, and wherein the anode electrode is disposed on the sidewalls.
  4. 4 . The display device according to claim 3 , further comprising a pixel defining layer which encloses sides of the anode electrode, wherein the pixel defining layer is disposed on the second sidewall, and wherein the anode electrode has a surface area smaller than a surface area of the second sidewall in the plan view.
  5. 5 . The display device according to claim 3 , wherein the cathode electrode comprises: a first cathode electrode which contacts the first emission structure, the second emission structure, and the third emission structure; and a second cathode electrode disposed on the first cathode electrode.
  6. 6 . The display device according to claim 5 , wherein the second cathode electrode includes a transparent conductive oxide, and wherein the second cathode electrode encloses the second sidewall.
  7. 7 . The display device according to claim 5 , wherein the capping layer has a first transmittance and a first refractive index with respect to light in a visible light range, wherein the second cathode electrode has a second transmittance and a second refractive index with respect to the light in the visible light range, wherein the first transmittance is in a range from 0.9 times to 1.1 times the second transmittance, and wherein the first refractive index is in a range from 0.9 times to 1.1 times the second refractive index.
  8. 8 . The display device according to claim 5 , wherein the capping layer does not overlap one of the first emission structure, the second emission structure, and the third emission structure in the plan view, and overlaps remaining two of the first emission structure, the second emission structure, and the third emission structure in the plan view.
  9. 9 . The display device according to claim 5 , wherein the capping layer does not overlap two of the first emission structure, the second emission structure, and the third emission structure in the plan view, and overlaps a remaining one of the first emission structure, the second emission structure, and the third emission structure in the plan view.
  10. 10 . The display device according to claim 3 , further comprising an encapsulation layer disposed on the capping layer, wherein the capping layer contacts the encapsulation layer.
  11. 11 . The display device according to claim 3 , wherein the first sub-pixel provides light in a wavelength range from about 600 nm to about 750 nm, wherein the second sub-pixel provides light in a wavelength range from about nm to about 560 nm, wherein the third sub-pixel provides light in a wavelength range from about 370 nm to about 460 nm, wherein, in the plan view, the capping layer overlaps the first emission structure and the second emission structure, and does not overlap the third emission structure, and wherein each of the first emission structure, the second emission structure, and the third emission structure includes an organic emission material.
  12. 12 . The display device according to claim 1 , wherein the cathode electrode comprises: a first cathode electrode which contacts the first emission structure, the second emission structure, and the third emission structure; and a second cathode electrode disposed on the first cathode electrode, and wherein portions of the second cathode electrode, which respectively overlap the first emission structure, the second emission structure and the third emission structure, have different thicknesses from each other.
  13. 13 . The display device according to claim 12 , further comprising an encapsulation layer disposed on the second cathode electrode, wherein the second cathode electrode contacts the encapsulation layer.
  14. 14 . The display device according to claim 13 , further comprising a pixel defining layer disposed under the sidewalls, wherein the pixel defining layer exposes at least a portion of the anode electrode, and wherein the sidewalls are respectively located in areas between the first emission structure, the second emission structure, and the third emission structure.
  15. 15 . The display device according to claim 13 , further comprising a pixel defining layer which encloses sides the anode electrode, wherein the anode electrode and the pixel defining layer are disposed on the second sidewall, and wherein the anode electrode has a surface area smaller than a surface area of the second sidewall in a plan view.
  16. 16 . A method of fabricating a display device, the method comprising: forming sidewalls on a substrate on which a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area are defined; forming a first light emitting element on the substrate in the first sub-pixel area; forming a second light emitting element on the substrate in the second sub-pixel area; forming a third light emitting element on the substrate in the third sub-pixel area; and forming a capping layer on at least one selected from the first light emitting element, the second light emitting element, and the third light emitting element, wherein the forming the first light emitting element comprises forming a first emission structure, wherein the forming the second light emitting element comprises forming a second emission structure, wherein the forming the third light emitting element comprises forming a third emission structure, wherein the first emission structure, the second emission structure, and the third emission structure are respectively formed through different processes, wherein each of the sidewalls comprises: a first sidewall; and a second sidewall disposed on the first sidewall, and having a width greater than a width of the first sidewall, and wherein the capping layer overlaps the at least one selected from of the first light emitting element, the second light emitting element, and the third light emitting element in a plan view.
  17. 17 . The method according to claim 16 , wherein each of the forming the first light emitting element, the forming the second light emitting element, and the forming the third light emitting element comprises forming a cathode electrode, wherein the cathode electrode comprises: a first cathode electrode which contacts the first emission structure, the second emission structure, and the third emission structure; and a second cathode electrode disposed on the first cathode electrode, and wherein, in the plan view, the capping layer overlaps one or two of the first emission structure, the second emission structure, and the third emission structure.
  18. 18 . The method according to claim 17 , further comprising: forming anode electrodes on the substrate, wherein the anode electrodes are disposed on the sidewalls.
  19. 19 . A display system comprising: a processor; and a display device including pixels, wherein the display device displays images on the pixels under control of the processor, wherein the display device comprises: a substrate on which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined; sidewalls disposed on the substrate; an anode electrode disposed on the substrate to correspond to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel; a first emission structure disposed on the anode electrode of the first sub-pixel; a second emission structure disposed on the anode electrode of the second sub-pixel; a third emission structure disposed on the anode electrode of the third sub-pixel; anda cathode electrode disposed on each of the first emission structure, the second emission structure, and the third emission structure, wherein each of the sidewalls comprises: a first sidewall; and a second sidewall disposed on the first sidewall, and having a width greater than a width of the first sidewall.
  20. 20 . The display system according to claim 19 , wherein the cathode electrode comprises: a first cathode electrode which contacts the first emission structure, the second emission structure, and the third emission structure; and a second cathode electrode disposed on the first cathode electrode, and wherein portions of the second cathode electrode, which respectively overlap the first emission structure, the second emission structure, and the third emission structure, have different thicknesses from each other.

Description

This application claims priority to Korean Patent Application No. 10-2024-0153755, filed on Nov. 1, 2024, and all the benefits accruing therefrom under 35 U.S.C. § 119, the content of which in its entirety is herein incorporated by reference. BACKGROUND (1) Field Various embodiments of the disclosure relate to a display device, a display system including the display device, and a method of fabricating the display device. (2) Description of the Related Art With the development of information technology, the importance of display devices as a medium which connects users and information has become increasingly emphasized. Accordingly, research and development on display devices have been continuously conducted. Organic light emitting diodes (OLEDs) are active emission display elements which are characterized by a wide viewing angle, high contrast, low-voltage operation, and relatively high response speed. Display devices may include a plurality of layers, and light emitted from the OLEDs may pass through the plurality of layers and be provided outward. Accordingly, the plurality of layers included in the display device may change optical characteristics of the emitted light. SUMMARY Embodiments of the disclosure are directed to a display device with improved light efficiency and lifespan, a display system including the display device, and a method of fabricating the display device. Embodiments of the disclosure are directed to a method of fabricating a display device capable of facilitating a fabrication process. An embodiment of the present disclosure provides a display device, including: a substrate on which a first sub-pixel, a second sub-pixel, and a third sub-pixel are defined; sidewalls disposed on the substrate; an anode electrode disposed on the substrate to correspond to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel; a first emission structure disposed on the anode electrode of the first sub-pixel; a second emission structure disposed on the anode electrode of the second sub-pixel; a third emission structure disposed on the anode electrode of the third sub-pixel; a cathode electrode disposed on the first emission structure, the second emission structure, and the third emission structure; and a capping layer disposed on the cathode electrode. In such an embodiment, each of the sidewalls includes: a first sidewall; and a second sidewall disposed on the first sidewall, and having a width greater than a width of the first sidewall. In such an embodiment, the capping layer does not overlap at least one of the first emission structure, the second emission structure, and the third emission structure in a plan view. In an embodiment, the display device may include a pixel defining layer disposed under the sidewalls. In such an embodiment, the pixel defining layer may exposes at least a portion of the anode electrode. In such an embodiment, the sidewalls may be respectively located in areas between the first emission structure, the second emission structure, and the third emission structure. In an embodiment, the anode electrode may be disposed on the sidewalls. In an embodiment, the display device may further include a pixel defining layer which encloses the anode electrode. In such an embodiment, the pixel defining layer may be disposed on the second sidewall. In such an embodiment, the anode electrode may have a surface area smaller than a surface area of the second sidewall in a plan view. In an embodiment, the cathode electrode may include: a first cathode electrode which contacts the first emission structure, the second emission structure, and the third emission structure; and a second cathode electrode disposed on the first cathode electrode. In an embodiment, the second cathode electrode may include a transparent conductive oxide (TCO). In such an embodiment, the second cathode electrode may enclose the second sidewall. In an embodiment, the capping layer may have a first transmittance and a first refractive index with respect to light in a visible light range. In such an embodiment, the second cathode electrode may have a second transmittance and a second refractive index with respect to the light in the visible light range. In such an embodiment, the first transmittance may be in a range from 0.9 times to 1.1 times the second transmittance. In such an embodiment, the first refractive index may be in a range from 0.9 times to 1.1 times the second refractive index. In an embodiment, the capping layer may not overlap one of the first emission structure, the second emission structure, and the third emission structure in the plan view, and may overlap remaining two of the first emission structure, the second emission structure, and the third emission structure in the plan view. In an embodiment, the capping layer may not overlap two of the first emission structure, the second emission structure, and the third emission structure in the plan view, and may overlap a remaining one