US-20260130123-A1 - Method for Preparing Quantum Device, and Superconducting Circuit and Quantum Chip

US20260130123A1US 20260130123 A1US20260130123 A1US 20260130123A1US-20260130123-A1

Abstract

Disclosed in the present disclosure are a method for preparing a quantum device, and a superconducting circuit and a quantum chip. The method includes: sequentially obtaining a plurality of superconducting material layers in different regions of a substrate, wherein the plurality of superconducting material layers each include a superconducting material deposited on the substrate and a hard mask covering the corresponding superconducting material, and the superconducting materials in the plurality of superconducting material layers include a superconducting material having kinetics inductance; performing etching to remove the hard masks on the plurality of superconducting material layers, so as to obtain a plurality of target circuit elements integrated on the substrate; and preparing a target quantum device based on the plurality of target circuit elements. The present disclosure solves the technical problem of difficult preparation of a superconducting quantum device.

Inventors

RAN GAO
Chunqing Deng

Assignees

ALIBABA DAMO (HANGZHOU) TECHNOLOGY CO., LTD.

Dates

Publication Date: 20260507
Application Date: 20230925
Priority Date: 20220930

Claims (20)

1 . A method for preparing a quantum device, comprising: sequentially obtaining a plurality of superconducting material layers in different regions of a substrate, wherein the plurality of superconducting material layers each include a superconducting material deposited on the substrate and a hard mask covering the corresponding superconducting material, and the superconducting materials in the plurality of superconducting material layers include superconducting materials having kinetics inductance; performing etching to remove the hard masks on the plurality of superconducting material layers, so as to obtain a plurality of target circuit elements integrated on the substrate; and preparing a target quantum device based on the plurality of target circuit elements.
2 . The method as claimed in claim 1 , wherein when the plurality of superconducting material layers are two superconducting material layers and the two superconducting material layers are a first superconducting material layer and a second superconducting material layer, sequentially obtaining the plurality of superconducting material layers in different regions of the substrate includes: depositing, on the substrate, the first superconducting material layer of a first superconducting material of a first target region range covered by a first hard mask of the first target region range, wherein the first superconducting material is the superconducting material having kinetics inductance; depositing a second superconducting material on the substrate deposited with the first superconducting material layer; covering a second hard mask on the second superconducting material; and etching the second hard mask and the second superconducting material to obtain a second superconducting material layer of the second superconducting material of a second target region range covered by the second hard mask of the second target region range.
3 . The method as claimed in claim 2 , wherein depositing, on the substrate, the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range includes: depositing the first superconducting material on the substrate; covering the first hard mask on the first superconducting material; determining the first target region range of the first superconducting material that is to be remained on the substrate; and etching the first hard mask and the first superconducting material to obtain the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range.
4 . The method as claimed in claim 3 , wherein etching the first hard mask and the first superconducting material to obtain the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range includes: performing gradual etching to remove the first hard mask of a first other region range in the first hard mask and a superconducting material of a first other region in the first superconducting material, respectively, so as to obtain the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range, wherein the first other region range is a region range on the substrate other than the first target region range.
5 . The method as claimed in claim 2 , wherein etching the second hard mask and the second superconducting material to obtain the second superconducting material layer of the second superconducting material of the second target region range covered by the second hard mask of the second target region range includes: performing gradual etching to remove the second hard mask of a second other region in the second hard mask and a superconducting material of the second other region in the second superconducting material, respectively, so as to obtain the second superconducting material layer of the second superconducting material of the second target region range covered by the second hard mask of the second target region range, wherein the second other region range is a region range on the substrate other than the second target region range.
6 . The method as claimed in claim 1 , wherein preparing the target superconducting device based on the plurality of target circuit elements includes: determining a junction region and an ohmic contact region on the substrate; and using a shadow evaporation method to evaporate and deposit a Josephson junction in the junction region and evaporate and deposit an ohmic contact in the ohmic contact region, so as to obtain a superconducting quantum bit as the target superconducting device.
7 . The method as claimed in claim 6 , wherein the superconducting quantum bit is a Fluxonium quantum bit.
8 . The method as claimed in claim 2 , wherein after depositing, on the substrate, the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range, the method further includes: performing a high-temperature annealing treatment on the first superconducting material layer to obtain a target first superconducting material layer, wherein a kinetics inductance value of the first superconducting material in the target first superconducting material layer reaches a target kinetics inductance value.
9 . The method as claimed in claim 8 , wherein performing the high-temperature annealing treatment on the first superconducting material layer to obtain the target first superconducting material layer includes: selecting a target high-temperature annealing control parameter from a plurality of candidate high-temperature annealing control parameters; and performing the high-temperature annealing treatment on the first superconducting material layer based on the target high-temperature annealing control parameter, so as to obtain the target first superconducting material layer.
10 . The method as claimed in claim 2 , wherein performing etching to remove the first hard mask on the first superconducting material layer and the second hard mask on the second superconducting material layer, so as to obtain the target circuit elements integrated on the substrate includes: performing etching, by using a Hydrofluoric Acid (DHF) solution, to remove the first hard mask on the first superconducting material layer and the second hard mask on the second superconducting material layer, so as to obtain the target circuit elements integrated on the substrate.
11 . The method as claimed in any one of claims 1 , wherein the hard mask is silicon nitride.
12 . A method for preparing a Fluxonium quantum bit, comprising: depositing, on a substrate, a first superconducting material layer of a first superconducting material of a first target region range covered by a first hard mask of the first target region range, wherein the first superconducting material is a superconducting material having kinetics inductance; depositing a second superconducting material on the substrate deposited with the first superconducting material layer; covering a second hard mask on the second superconducting material; etching the second hard mask and the second superconducting material to obtain a second superconducting material layer of the second superconducting material of a second target region range covered by the second hard mask of the second target region range, wherein the second target region range includes a first sub-region range, a second sub-region range, and a third sub-region range, which are separate from each other; performing etching to remove the first hard mask on the first superconducting material layer and the second hard mask on the second superconducting material layer, so as to obtain the first superconducting materials integrated on the substrate that are located within the first target region range, and the second superconducting materials in the first sub-region range, second sub-region range, and third sub-region range; and depositing an ohmic contact between the first superconducting material and the second superconducting material within the first sub-region range, and depositing a Josephson junction between the second superconducting material within the second sub-region range and the second superconducting material within the third sub-region range, so as to obtain a Fluxonium quantum bit.
13 - 14 . (canceled)
15 . A quantum computer, including a quantum memory and the quantum chip, wherein the quantum chip including the Fluxonium quantum bit prepared by the following actions: depositing, on a substrate, a first superconducting material layer of a first superconducting material of a first target region range covered by a first hard mask of the first target region range, wherein the first superconducting material is a superconducting material having kinetics inductance; depositing a second superconducting material on the substrate deposited with the first superconducting material layer; covering a second hard mask on the second superconducting material; etching the second hard mask and the second superconducting material to obtain a second superconducting material layer of the second superconducting material of a second target region range covered by the second hard mask of the second target region range, wherein the second target region range includes a first sub-region range, a second sub-region range, and a third sub-region range, which are separate from each other; performing etching to remove the first hard mask on the first superconducting material layer and the second hard mask on the second superconducting material layer, so as to obtain the first superconducting materials integrated on the substrate that are located within the first target region range, and the second superconducting materials in the first sub-region range, second sub-region range, and third sub-region range; and depositing an ohmic contact between the first superconducting material and the second superconducting material within the first sub-region range, and depositing a Josephson junction between the second superconducting material within the second sub-region range and the second superconducting material within the third sub-region range, so as to obtain a Fluxonium quantum bit.
16 . The method as claimed in claim 2 , wherein the hard mask is silicon nitride.
17 . The method as claimed in claim 3 , wherein the hard mask is silicon nitride.
18 . The method as claimed in claim 4 , wherein the hard mask is silicon nitride.
19 . The method as claimed in claim 5 , wherein the hard mask is silicon nitride.
20 . The method as claimed in claim 6 , wherein the hard mask is silicon nitride.
21 . The method as claimed in claim 7 , wherein the hard mask is silicon nitride.

Description

This present disclosure claims priority to Chinese Patent Application No. 202211215563.3 filed to the China National Intellectual Property Administration on Sep. 30, 2022 and entitled “Method for Preparing Quantum Device, and Superconducting Circuit and Quantum Chip”, the disclosure of which is hereby incorporated by reference in its entirety. TECHNICAL FIELD The present disclosure relates to the field of superconducting quanta, and specifically, to a method for preparing a quantum device, and a superconducting circuit and a quantum chip. BACKGROUND In the related art, the preparation of superconducting quantum bits using high inductance materials requires high preparation techniques and makes it difficult to realize the preparation of superconducting quantum devices. Therefore, there is a technical problem of difficult preparation of a superconducting quantum device in the related art. In view of the above problem, no effective solution has been proposed yet. SUMMARY Embodiments of the present disclosure provide a method for preparing a quantum device, and a superconducting circuit and a quantum chip, so as to at least solve the technical problem of difficult preparation of a superconducting quantum device. An aspect of an embodiment of the present disclosure provides a method for preparing a quantum device, including: sequentially obtaining a plurality of superconducting material layers in different regions of a substrate, wherein the plurality of superconducting material layers each include a superconducting material deposited on the substrate and a hard mask covering the corresponding superconducting material, and the superconducting materials in the plurality of superconducting material layers include superconducting materials having kinetics inductance; performing etching to remove the hard masks on the plurality of superconducting material layers, so as to obtain a plurality of target circuit elements integrated on the substrate; and preparing a target quantum device based on the plurality of target circuit elements. As at least one alternative embodiment, wherein when the plurality of superconducting material layers are two superconducting material layers and the two superconducting material layers are a first superconducting material layer and a second superconducting material layer, sequentially obtaining the plurality of superconducting material layers in different regions of the substrate includes: depositing, on the substrate, the first superconducting material layer of a first superconducting material of a first target region range covered by a first hard mask of the first target region range, wherein the first superconducting material is the superconducting material having kinetics inductance; depositing a second superconducting material on the substrate deposited with the first superconducting material layer; covering a second hard mask on the second superconducting material; and etching the second hard mask and the second superconducting material to obtain a second superconducting material layer of the second superconducting material of a second target region range covered by the second hard mask of the second target region range. As at least one alternative embodiment, wherein depositing, on the substrate, the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range includes: depositing the first superconducting material on the substrate; covering the first hard mask on the first superconducting material; determining the first target region range of the first superconducting material that is to be remained on the substrate; and etching the first hard mask and the first superconducting material to obtain the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range. As at least one alternative embodiment, wherein etching the first hard mask and the first superconducting material to obtain the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range includes: performing gradual etching to remove the first hard mask of a first other region range in the first hard mask and a superconducting material of a first other region in the first superconducting material, respectively, so as to obtain the first superconducting material layer of the first superconducting material of the first target region range covered by the first hard mask of the first target region range, wherein the first other region range is a region range on the substrate other than the first target region range. As at least one alternative embodiment, wherein etching the second hard mask and the second superconducting material to obtain the second superconducting material layer of the second