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US-20260130137-A1 - METAL SILICIDE POST TREATMENT TO ENHANCE THERMAL STABILITY

US20260130137A1US 20260130137 A1US20260130137 A1US 20260130137A1US-20260130137-A1

Abstract

A method of forming and post-treating a metal silicide layer in a semiconductor structure includes performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate, performing a chemical vapor deposition (CVD) soak process in which the metal silicide layer is exposed to a nitrogen (N)-containing liquid precursor, forming a metal silicide nitride layer, and performing a cap deposition process, in which a cap layer is deposited on the metal silicide nitride layer.

Inventors

  • Xi CEN
  • Ying-Bing JIANG
  • Yuxin Wang
  • Yao Xu
  • Avgerinos V. Gelatos
  • JOUNG JOO LEE
  • Kai Wu
  • Cheng Cheng

Assignees

  • APPLIED MATERIALS, INC.

Dates

Publication Date
20260507
Application Date
20241101

Claims (20)

  1. 1 . A method of forming and post-treating a metal silicide layer in a semiconductor structure, comprising: performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate; performing a chemical vapor deposition (CVD) soak process in which the metal silicide layer is exposed to a nitrogen (N)-containing liquid precursor, forming a metal silicide nitride layer; and performing a cap deposition process, in which a cap layer is deposited on the metal silicide nitride layer.
  2. 2 . The method of claim 1 , wherein the metal silicide layer comprises molybdenum silicide.
  3. 3 . The method of claim 1 , wherein the metal silicide layer has a thickness of between 30 Å and 50 Å.
  4. 4 . The method of claim 1 , wherein the silicide deposition process comprises atomic layer deposition (ALD) or pseudo ALD using a deposition gas including a metal source.
  5. 5 . The method of claim 4 , wherein the silicide deposition process is performed at a temperature of between 240° C. and about 450° C. and at a pressure of between 3 Torr and 300 Torr.
  6. 6 . The method of claim 1 , wherein the nitrogen (N)-containing liquid precursor comprises ammonia (NH 3 ).
  7. 7 . The method of claim 1 , wherein the CVD soak process is performed at a temperature of between 300° C. to 450° C., for a time period of between 10 seconds and 30 seconds.
  8. 8 . A method of forming and post-treating a metal silicide layer in a semiconductor structure, comprising: performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate; performing a chemical vapor deposition (CVD) soak process in which the metal silicide layer is exposed to a silicon-containing precursor, forming a thin silicon (Si) layer over the metal silicide layer; and performing a cap deposition process, in which a cap layer is deposited over the metal silicide layer.
  9. 9 . The method of claim 8 , wherein the metal silicide layer comprises molybdenum silicide.
  10. 10 . The method of claim 8 , wherein the metal silicide layer has a thickness of between 30 Å and 50 Å.
  11. 11 . The method of claim 8 , wherein the silicide deposition process comprises atomic layer deposition (ALD) or pseudo ALD using a deposition gas including a metal source.
  12. 12 . The method of claim 11 , wherein the silicide deposition process is performed at a temperature of between 240° C. and about 450° C. and at a pressure of between 3 Torr and 300 Torr.
  13. 13 . The method of claim 8 , wherein the silicon-containing precursor comprises silane (SiH 4 ) and disilane (Si 2 H 6 ).
  14. 14 . The method of claim 8 , wherein the thin silicon (Si) layer has a thickness of between 5 Å and 8 Å.
  15. 15 . The method of claim 8 , wherein the CVD soak process is performed at a temperature of between 300° C. to 450° C., for a time period of between 10 seconds and 30 seconds.
  16. 16 . A method of forming and post-treating a metal silicide layer in a semiconductor structure, comprising: performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate; performing an anneal process in which the metal silicide layer is crystalized, forming a crystalized metal silicide layer over the metal silicide layer; and performing a cap deposition process, in which a cap layer is deposited over the metal silicide layer.
  17. 17 . The method of claim 16 , wherein the metal silicide layer comprises molybdenum silicide and the crystalized metal silicide layer comprises molybdenum disilicide (MoSi 2 ).
  18. 18 . The method of claim 16 , wherein the metal silicide layer has a thickness of between 30 Å and 50 Å.
  19. 19 . The method of claim 16 , wherein the silicide deposition process comprises atomic layer deposition (ALD) or pseudo ALD using a deposition gas including a metal source.
  20. 20 . The method of claim 16 , wherein the anneal process is performed for between 5 second and 60 seconds, at a temperature of between 500 ° C. and 600 ° C., and at a pressure of between 5 Torr and 500 Torr.

Description

BACKGROUND Field Embodiments described herein generally relate to semiconductor device fabrication, and more particularly, to methods of forming and post-treating metal silicide. Description of the Related Art The production of silicon integrated circuits has placed difficult demands on fabrication processes to increase the number of devices while decreasing the minimum feature sizes on a chip. These demands have extended to fabrication processes including depositing layers onto difficult topologies while maintaining device reliability. For example, in three dimensional (3D) dynamic random access memory (DRAM) devices or multi-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), such as complementary metal-oxide semiconductor (CMOS) devices, metal silicide (e.g., molybdenum silicide (MoSix), ruthenium silicide (RuxSiy)) is often utilized to lower a contact resistivity. However, metal silicide (e.g., molybdenum silicide (MoSix)) has been known to have thermal stability issues due to inter-diffusion of metal elements (e.g., molybdenum (Mo)) at interfaces between silicon (Si) and metal silicide (e.g., molybdenum silicide (MoSix)) during a subsequent anneal process, causing device failure. Therefore, there is a need for methods and systems that can form thermally stable metal silicide with reduced diffusion of metal elements (e.g., molybdenum (Mo)) out of a metal silicide. SUMMARY Embodiments of the present disclosure provide a method of forming and post-treating a metal silicide layer in a semiconductor structure. The method includes performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate, performing a chemical vapor deposition (CVD) soak process in which the metal silicide layer is exposed to a nitrogen (N)-containing liquid precursor, forming a metal silicide nitride layer, and performing a cap deposition process, in which a cap layer is deposited on the metal silicide nitride layer. Embodiments of the present disclosure also provide a method of forming and post-treating a metal silicide layer in a semiconductor structure. The method includes performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate, performing a chemical vapor deposition (CVD) soak process in which the metal silicide layer is exposed to a silicon-containing precursor, forming a thin silicon (Si) layer over the metal silicide layer; and performing a cap deposition process, in which a cap layer is deposited over the metal silicide layer. Embodiments of the present disclosure further provide a method of forming and post-treating a metal silicide layer in a semiconductor structure. The method includes performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate, performing an anneal process in which the metal silicide layer is crystalized, forming a crystalized metal silicide layer over the metal silicide layer, and performing a cap deposition process, in which a cap layer is deposited over the metal silicide layer. BRIEF DESCRIPTION OF THE DRAWINGS So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments. FIG. 1 is a schematic top view of an exemplary substrate processing system according to one or more embodiments of the present disclosure. FIG. 2 depicts a process flow diagram of a method of forming and post-treating a metal silicide layer in a semiconductor structure according to one or more embodiments of the present disclosure. FIGS. 3A, 3B, 3C, 3D, 3E, 3F, 3G, 3H, and 3I are cross-sectional views of a portion of a semiconductor structure corresponding to various states of the method of FIG. 2. To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION The embodiments described herein provide methods for forming and post-treating metal silicide (e.g., molybdenum silicide (MoSix), ruthenium silicide (RuxSiy)) that can be used to reduce a contact resistance in three dimensional (3D) dynamic random access memory (DRAM) devices or multi-gate metal-oxide-semiconductor field-effect transistors (MOSFETs). Three embodiments of post-treatment of metal silicide described below include (1) a chemical vapor deposition (CVD) soak in a nitrogen (N)-containing liquid precursor, (2) a CVD soak in a s