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US-20260130144-A1 - METHODS OF SELECTIVELY ETCHING SILICON

US20260130144A1US 20260130144 A1US20260130144 A1US 20260130144A1US-20260130144-A1

Abstract

Embodiments of the present disclosure are directed to methods of selectively etching silicon. The methods include flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and one or more of an amine, a phosphine, a glycol, or an acid, or a mixture of one or more of the interhalogen, the halogen-containing species, the pseudohalogen species and a sulfur-containing species, into a semiconductor processing chamber containing a substrate; forming an activated species of the precursor; and exposing the substrate to the activated species to etch the substrate. The methods selectively etch silicon relative to silicon germanium, silicon oxide, and/or silicon nitride.

Inventors

  • Doreen Wei Ying Yong
  • Chiew Wah Yap
  • Mikhail Korolik
  • Paul E. Gee

Assignees

  • APPLIED MATERIALS, INC.

Dates

Publication Date
20260507
Application Date
20241105

Claims (20)

  1. 1 . A method comprising: flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and one or more of an amine, a phosphine, a glycol, or an acid, or a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and a sulfur-containing species, into a semiconductor processing chamber containing a substrate; forming an activated species of the precursor; exposing the substrate to the activated species; and etching the substrate, the substrate having a plurality of alternating layers of silicon and silicon oxide thereon, wherein the silicon layers are selectively etched relative to the silicon oxide layers.
  2. 2 . The method of claim 1 , wherein the interhalogen comprises one or more of chlorine trifluoride (ClF 3 ), bromine trifluoride (BrF 3 ), bromine pentafluoride (BrF 5 ), iodine monochloride (ICI), iodine monobromide (IBr), iodine trifluoride (IF 3 ), iodine pentafluoride (IF 5 ), or iodine heptafluoride (IF 7 ).
  3. 3 . The method of claim 1 , wherein the halogen-containing species comprises one or more of fluorine (F 2 ), bromine (Br 2 ), chlorine (Cl 2 ), iodine (I 2 ), boron trichloride (BCl 3 ), HF-pyridine, boron tribromide (BBr 3 ), hydrobromic acid (HBr), trimethylchlorosilane (Me 3 SiCl), dichloromethylsilane (CH 4 Cl 2 Si), (dielthylaminso) sulfur trifluoride (DAST), sulfur hexafluoride (SF 6 ), nitrogen trifluoride (NF 3 ), trifluoroiodomethane (CF 3 l), sulfuryl chloride (SO 2 Cl 2 ), thionyl bromide (SOBr 2 ), thionyl chloride (SOCl 2 ), xenon difluoride (XeF 2 ), titanium tetrachloride (TiCl 4 ), molybdenum pentafluoride (MoF 5 ), molybdenum pentachloride (MoCl 5 ) tungsten pentafluoride (WF 5 ), or tungsten pentachloride (WCl 5 ).
  4. 4 . The method of claim 1 , wherein the sulfur-containing species comprises a disulfide molecule.
  5. 5 . The method of claim 4 , wherein the disulfide molecule comprises one or more of Me-S—S-Me (dimethyl dilsulfide), Cl—S—S—Cl (disulfur dichloride), or (disulfur tetrachloride).
  6. 6 . The method of claim 1 , wherein the pseudohalogen species comprises one or more of an isocyano group, a sulfanyl group, a cyanate group, an isocyanate group, a thiocyanate group, or an isothiocyanate group.
  7. 7 . The method of claim 1 , wherein the amine comprises diethylamine (DEA), tetramethylethylenediamine (TMEDA), methylamine (MEA), triethylamine (Et 3 N), or ammonia (NH 3 ).
  8. 8 . The method of claim 1 , wherein the phosphine comprises triethylphosphine (PEt 3 ).
  9. 9 . The method of claim 1 , wherein the glycol comprises one or more of pinacol or hexylene glycol.
  10. 10 . The method of claim 1 , wherein the acid comprises one or more of acetic acid or hydrochloric acid (HCl).
  11. 11 . The method of claim 1 , wherein forming the activated species comprises one or more of a thermal process, generating a plasma of the precursor, or heating the substrate to a temperature of less than or equal to 500° C. using an optical radiation source.
  12. 12 . The method of claim 11 , wherein the plasma is generated by one or more of a microwave plasma source, a remote plasma source, an inductively coupled plasma (ICP) source, or a capacitively coupled plasma (CCP) source.
  13. 13 . The method of claim 11 , wherein the activated species is generated by UV radiation.
  14. 14 . The method of claim 1 , wherein the silicon layers are etched relative to the silicon oxide layers at a selectivity ratio of greater than or equal to 50:1.
  15. 15 . The method of claim 1 , wherein the substrate comprises a trench having a depth of greater than or equal to 1 μm.
  16. 16 . The method of claim 1 , wherein the semiconductor processing chamber is maintained at a pressure in a range of from 5 millitorr to 100 Torr and a temperature of less than or equal to 500° C.
  17. 17 . The method of claim 1 , further comprising purging the semiconductor processing chamber with a purge gas.
  18. 18 . The method of claim 17 , wherein the purge gas includes one or more of argon (Ar), helium (He), krypton (Kr), neon (Ne), xenon (Xe), hydrogen (H 2 ), oxygen (O 2 ), or nitrogen (N 2 ).
  19. 19 . A method comprising: flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and one or more of an amine, a phosphine, a glycol, or an acid, or a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and a sulfur-containing species, into a semiconductor processing chamber containing a substrate; forming an activated species of the precursor; exposing the substrate to the activated species; and etching the substrate, the substrate having a plurality of alternating layers of silicon and silicon germanium thereon, wherein the silicon layers are selectively etched relative to the silicon germanium layers.
  20. 20 . A method comprising: flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and one or more of an amine, a phosphine, a glycol, or an acid, or a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and a sulfur-containing species, into a semiconductor processing chamber containing a substrate; forming an activated species of the precursor; exposing the substrate to the activated species; and etching the substrate, the substrate having a plurality of alternating layers of silicon and silicon germanium thereon, and alternating silicon oxide layers and silicon nitride layers in contact with the alternating silicon layers and silicon germanium layers, wherein the silicon layers are selectively etched relative to the silicon oxide layers and the silicon nitride layers.

Description

TECHNICAL FIELD Embodiments of the disclosure relate to the field of electronic device manufacturing. More particularly, embodiments of the disclosure relate to methods of selectively etching silicon. BACKGROUND Integrated circuits are made possible by processes which produce intricately patterned material layers on substrate surfaces. Producing patterned material on a substrate requires controlled methods for removal of exposed material. Chemical etching processes are used for a variety of purposes, including transferring a pattern in photoresist into underlying layers, thinning layers, or thinning lateral dimensions of features already present on a surface. Chemical etching processes typically include chemistries that etch one material (e.g., a first material) faster than another (e.g., a second material) facilitating, for example, a pattern transfer process. Such an etch process is said to be selective to the first material. As a result of the diversity of materials, circuits, and processes, etch processes have been developed with a selectivity towards a variety of materials. The fabrication of three-dimensional dynamic random access memory (3D-DRAM) devices, for example, includes the formation of alternating silicon (Si) and one or more of silicon germanium (SiGe), silicon oxide (SiO2), or silicon nitride (Si3N4) layers. After the formation of a stack of alternating layers, the silicon (Si) layers are selectively etched to form recesses leaving behind the desired device structures, facilitating the creation of these intricate 3D architectures. Etch processes may be termed “wet” or “dry” based on the materials used in the process. A wet HF etch preferentially removes silicon oxide over other dielectric materials. However, wet processes may have difficulty penetrating some constrained trenches and also may sometimes deform the remaining material. Dry etches produced in local plasmas formed within a substrate processing region can penetrate more constrained trenches and exhibit less deformation of delicate remaining structures. However, local plasmas may damage the substrate through the production of electric arcs as they discharge. There is a need for improved systems and methods that can be used to produce high quality structures and devices. Currently, wet etching processes are typically used to selectively remove the silicon layers. However, in the drying process after the wet etching process, the suspended silicon oxide layers may collapse due to surface tension of the liquid. This leads to yield losses. Another issue with wet etching processes is that with future scaling of the vertical (V)-NAND (i.e., 3D-NAND) devices and 3D-DRAM devices, for example, the number of layers of silicon and silicon germanium increases. This is problematic because the liquid etchant will have difficulty filling into a deeper trench. This results in non-uniform etching, such that the etching of the top of the 3D-DRAM device is different than the etching of the bottom of the 3D-DRAM device. With the future scaling of devices, uniform or “conformal” etching is a manufacturing requirement. Current dry etching techniques also etch silicon oxide, in addition to silicon, thereby reducing selectivity of such processes. Accordingly, there is a need for improved etch processes that achieve improved etching selectivity. SUMMARY One or more embodiments are directed to a method comprising: flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and one or more of an amine, a phosphine, a glycol, or an acid, or a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and a sulfur-containing species, into a semiconductor processing chamber containing a substrate; forming an activated species of the precursor; exposing the substrate to the activated species; and etching the substrate. The substrate has a plurality of alternating layers of silicon and silicon oxide thereon. The silicon layers are selectively etched relative to the silicon oxide layers. Additional embodiments are directed to a method comprising: flowing a precursor comprising one or more of an interhalogen, a halogen-containing species, a pseudohalogen species, a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and one or more of an amine, a phosphine, a glycol, or an acid, or a mixture of one or more of the interhalogen, the halogen-containing species, or the pseudohalogen species and a sulfur-containing species, into a semiconductor processing chamber containing a substrate; forming an activated species of the precursor; exposing the substrate to the activated species; and etching the substrate. The substrate has a plurality of alternating layers of silicon and silicon germanium thereon. The silicon