Search

US-20260130153-A1 - AUTOMATED OVERLAY REMOVAL DURING WAFER SINGULATION

US20260130153A1US 20260130153 A1US20260130153 A1US 20260130153A1US-20260130153-A1

Abstract

In some examples, a device comprises a wafer chuck, a member having a surface facing the wafer chuck, a blade supported by the surface, a first vacuum nozzle extending through the member and having a first vacuum orifice facing a same direction as the surface, and a second vacuum nozzle extending through the member and having a second vacuum orifice facing the same direction as the surface. The first and second vacuum orifices are on opposing sides of the blade.

Inventors

  • Andrew Nelson
  • John C. Ehmke
  • Daryl R. Koehl
  • Nathan BAYS

Assignees

  • TEXAS INSTRUMENTS INCORPORATED

Dates

Publication Date
20260507
Application Date
20251218

Claims (19)

  1. 1 . A device, comprising: a wafer chuck; a member having a surface facing the wafer chuck; a blade supported by the surface; a first vacuum nozzle extending through the member and having a first vacuum orifice facing a same direction as the surface; and a second vacuum nozzle extending through the member and having a second vacuum orifice facing the same direction as the surface, the first and second vacuum orifices on opposing sides of the blade.
  2. 2 . The device of claim 1 , wherein the member is a wafer probe card.
  3. 3 . The device of claim 1 , wherein an angle between the blade and the surface ranges from 85 degrees to 95 degrees.
  4. 4 . The device of claim 1 , wherein the blade lies in a plane that coincides with the first and second vacuum orifices.
  5. 5 . The device of claim 1 , wherein the blade lies in a plane that does not coincide with the first or second vacuum orifices.
  6. 6 . The device of claim 1 , wherein the blade is configured to dislodge a pair of members of an assembly supported by the wafer chuck, the assembly including a glass wafer coupled to a semiconductor wafer by multiple interposers.
  7. 7 . The device of claim 6 , wherein each member in the pair of members includes a portion of an interposer of the multiple interposers and includes a portion of the glass wafer.
  8. 8 . The device of claim 7 , wherein the first vacuum nozzle and first vacuum orifice are configured to remove the pair of members from the assembly.
  9. 9 . The device of claim 1 , wherein the blade is composed of a metal or metal alloy.
  10. 10 . The device of claim 1 , wherein the blade has a width ranging from 3 mm to 20 mm.
  11. 11 . The device of claim 1 , wherein the blade has a length ranging from 5 mm to 15 mm.
  12. 12 . The device of claim 1 , wherein the blade has a thickness ranging from 200 microns to 300 microns.
  13. 13 . The device of claim 1 , further comprising: a mechanical arm configured to support the blade; and a strain gauge coupled to the mechanical arm.
  14. 14 . The device of claim 13 , further comprising: a storage device coupled to the strain gauge and configured to store strain measurements.
  15. 15 . The device of claim 1 , wherein the blade is positioned within one of the first and second vacuum orifices.
  16. 16 . The device of claim 1 , further comprising: a base coupled to the surface of the member; and a blade extension coupled to the base and supporting the blade.
  17. 17 . The device of claim 6 , wherein vertical orifices in the assembly include first orifices extending through the glass wafer, interposers and the semiconductor wafer, and second orifices extending through the glass wafer and partially into the interposes without reaching the semiconductor wafer.
  18. 18 . The device of claim 6 , further comprising: a controller configured to automatically index the blade to different pairs of members of the assembly.
  19. 19 . A semiconductor wafer prober device, comprising: a wafer chuck configured to support an assembly including a glass wafer coupled to a semiconductor wafer by multiple interposers; and a blade configured to dislodge first and second pairs of members of the assembly serially, the first and second pairs of members vertically aligned with different bond pads of the semiconductor wafer.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS The present U.S. Patent Application is a divisional of and claims priority to U.S. patent application Ser. No. 17/877,582, filed Jul. 29, 2022, which claims priority to U.S. Provisional Patent Application No. 63/302,295 , filed Jan. 24, 2022, each of which is incorporated by reference herein in its entirety. BACKGROUND Semiconductor chips are often housed inside semiconductor packages that protect the chips from deleterious environmental influences, such as heat, moisture, and debris. A packaged chip communicates with electronic devices outside the package via conductive terminals, such as leads, that are exposed to surfaces of the package. Within the package, the chip may be electrically coupled to the conductive terminals using any suitable technique. One such technique is the “flip-chip” technique, in which the semiconductor chip (also called a “die”) is oriented so the device side of the chip (in which circuitry is formed) is facing downward. The device side is coupled to the conductive terminals using, e.g., solder bumps. Another technique is the wirebonding technique, in which the device side of the semiconductor chip is oriented upward and is coupled to the conductive terminals using bond wires. Wirebonds are formed on bond pads, which are positioned on semiconductor dies and provide interfaces between the wirebonds and circuitry of the semiconductor dies. SUMMARY In some examples, a device comprises a wafer chuck, a member having a surface facing the wafer chuck, a blade supported by the surface, a first vacuum nozzle extending through the member and having a first vacuum orifice facing a same direction as the surface, and a second vacuum nozzle extending through the member and having a second vacuum orifice facing the same direction as the surface. The first and second vacuum orifices are on opposing sides of the blade. Other examples and combinations are described below. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A and 1B are profile and top-down views of a semiconductor wafer prober device, in accordance with various examples. FIG. 2 is a profile view of a test head and wafer chuck assembly, in accordance with various examples. FIGS. 3A-3H are various views of a test head assembly, in accordance with various examples. FIG. 4 is a flow diagram of a method for manufacturing a semiconductor package in accordance with various examples. FIG. 5A1-5D3 are a process flow for manufacturing a semiconductor package, in accordance with various examples. FIGS. 6A-6E are various views of a test head assembly, in accordance with various examples. FIG. 7 is a flow diagram of a method for manufacturing a semiconductor package in accordance with various examples. FIG. 8A1-8G3 are a process flow for manufacturing a semiconductor package, in accordance with various examples. DETAILED DESCRIPTION Prior to inclusion in a semiconductor package, a semiconductor die is produced by singulating a semiconductor wafer. Some wafers are readily singulated, for example, using a sawing or laser technique. However, some wafers are formed for specialized applications, as is the case with certain microelectromechanical systems (MEMS) devices. For example, some MEMS devices include a semiconductor wafer having multiple mirrors positioned thereupon and having a glass wafer positioned above the mirrors using multiple interposers. The glass wafer protects the underlying mirrors. Such a structure is readily singulated by using a saw or laser process to cut through the glass and semiconductor wafers. However, such singulation does not expose the bond pads of the semiconductor wafer that is below the glass wafer, as such bond pads are covered by the interposers used to position the glass wafer above the semiconductor wafer. To expose these bond pads on the semiconductor wafer, the interposers above the bond pads may be removed. Removal of such interposers (and other material, such as glass) obstructing access to the bond pads on the semiconductor wafer can be achieved through various techniques. This disclosure describes various examples of semiconductor wafer prober devices (SWPDs) for automating bond pad exposure in multi-wafer assemblies (e.g., glass wafers and semiconductor wafers coupled to each other by interposers). An example SWPD includes a wafer chuck configured to support a multi-wafer assembly including a glass wafer coupled to a semiconductor wafer by multiple interposers. The example SWPD includes a probe card or other circular or non-circular member adapted to couple to a test head and a blade supported by the probe card. When inserted between a pair of members of the multi-wafer assembly that is obstructing access to the semiconductor wafer bond pads and translated back and forth along a single axis, the blade is configured to dislodge the pair of members. A vacuum nozzle extends through the probe card and has an orifice facing the multi-wafer assembly. The vacuum removes the dislodged