US-20260130172-A1 - Miniature Electrostatic Chuck for Die-to-Substrate Bonding and Method for Manufacturing the Same

US20260130172A1US 20260130172 A1US20260130172 A1US 20260130172A1US-20260130172-A1

Abstract

The present disclosure provides a miniature electrostatic chuck (ESC) for die-to-wafer (D2W) bonding. The ESC can be manufactured using conventional semiconductor processes, incorporating through-silicon-via (TSV) and through-dielectric-via (TDV) structures. The ESC with different sizes can be attached to and detached from a multi-axis robotic arm, allowing optimized D2W bonding processes.

Inventors

Yang Pan

Assignees

Yang Pan

Dates

Publication Date: 20260507
Application Date: 20241107

Claims (20)

1 . A bonding head system for handling semiconductor dies, comprising: a miniature ESC manufactured using a semiconductor manufacturing process, wherein the ESC includes a multi-layered structure comprising: a silicon layer; a bulk dielectric layer disposed on the silicon layer, providing electrical insulation; a surface dielectric layer disposed on the bulk dielectric layer; a conductive pathway formed through the silicon layer and the bulk dielectric layer, comprising TSVs and TDVs, configured to apply a DC bias voltage to electrodes below the surface dielectric layer to generate an electrostatic clamping force for holding one or more semiconductor dies; and a support structure configured to detachably hold the miniature ESC and to supply the bias voltage; wherein the support structure is connected to a moving mechanism and wherein the semiconductor manufacturing process enables flexibility in the size of the miniature ESC.
2 . The system of claim 1 , wherein the moving mechanism includes a multi-axis robotic arm.
3 . The system of claim 1 , wherein the bulk dielectric layer has a thickness ranging from 1 micrometer to 50 micrometers.
4 . The system of claim 1 , wherein the bulk dielectric layer comprises a material selected from the group consisting of silicon dioxide, alumina, and aluminum nitride.
5 . The system of claim 1 , wherein the surface dielectric layer comprises a material selected from the group consisting of alumina and aluminum nitride.
6 . The system of claim 1 , wherein the surface dielectric layer is configured to provide controlled current leakage to enhance the electrostatic clamping force through the Johnsen-Rahbek (JR) effect.
7 . The system of claim 1 , wherein the TSVs and TDVs are filled with a conductive material selected from the group consisting of copper and tungsten.
8 . The system of claim 1 , further comprising alignment structures positioned on the surface dielectric layer to facilitate precise placement of semiconductor dies onto their designated positions.
9 . The system of claim 1 , wherein the miniature ESC has an area ranging from 4 mm 2 to 858 mm 2 .
10 . The system of claim 1 , wherein the bulk and surface dielectric layers are deposited using a process selected from the group consisting of plasma-enhanced chemical vapor deposition (PECVD), thermal CVD, and atomic layer deposition (ALD).
11 . The system of claim 1 , wherein the DC bias voltage is provided by a rechargeable battery located in the support structure.
12 . The system of claim 1 , wherein the DC bias voltage is provided through the moving mechanism.
13 . A method for manufacturing a miniature ESC for handling semiconductor dies, the method comprising: forming TSVs in a silicon wafer; depositing a bulk dielectric layer on the silicon wafer; forming TDVs and electrodes on the bulk dielectric layer; depositing a surface dielectric layer over the bulk dielectric layer; bonding the silicon wafer to a temporary substrate; conducting TSV revealing process and forming ESC contacts; debonding the temporary substrate; and separating the miniature ESCs through a dicing process.
14 . The method of claim 13 , wherein the bulk dielectric layer comprises a material selected from the group consisting of silicon dioxide, alumina, and aluminum nitride, and is deposited by using a PECVD or thermal CVD process.
15 . The method of claim 13 , wherein the surface dielectric layer comprises a material selected from the group consisting of aluminum oxide and aluminum nitride, and is deposited from a process selected from a group of the processes consisting of PECVD, thermal CVD, and ALD.
16 . The method of claim 13 , further comprising configuring the surface dielectric layer to allow controlled current leakage to generate an electrostatic clamping force through the Johnsen-Rahbek (JR) effect.
17 . The method of claim 13 , wherein the TSVs and TDVs are filled with a conductive material selected from the group consisting of copper and tungsten, with copper deposited through an electroplating process and tungsten deposited using a CVD or an ALD process.
18 . The method of claim 17 , further comprising removing a portion of copper or tungsten through a CMP process.
19 . The method of claim 13 , further comprising forming alignment structures on the surface dielectric layer.
20 . The method of claim 19 , wherein the alignment structures comprise a 2D barcode and a varied critical dimension (CD) grid.

Description

FIELD The present invention relates to bonding heads used in semiconductor manufacturing, specifically to miniature electrostatic chucks (ESCs) designed for handling thin semiconductor dies in advanced die-to-substrate bonding processes. BACKGROUND In advanced semiconductor packaging processes, handling and positioning thin dies, especially those susceptible to warpage, present critical challenges. Conventional bonding heads may lack the necessary control and stability for smaller, more delicate dies. The demand for a miniature ESC capable of securely holding such dies without damage has become increasingly important, especially as die thickness continues to decrease significantly. Miniature ESCs address these challenges by providing localized electrostatic clamping force for small dies. The electrostatic clamping force generated by the ESC mitigates the effects of warpage, flattening the die onto the chuck surface and promoting more uniform contact. However, manufacturing such specialized ESCs can be costly, and replacing them often incurs significant time and expense. The high cost and rigid structure of custom ESCs also limit flexibility, restricting their applicability across different die sizes and increasing operational costs. This invention introduces a miniature ESC fabricated using semiconductor manufacturing processes, yielding several distinct advantages. By leveraging well-established semiconductor fabrication techniques, production costs are reduced significantly, making the miniature ESCs affordable and accessible. The ability to fabricate ESCs in varying sizes provides flexibility, enabling a single miniature ESC to hold multiple dies simultaneously, if needed. Additionally, the ESC's detachable configuration simplifies replacement and maintenance, minimizing downtime and enhancing process efficiency. The detachable feature further improves adaptability, allowing for easy replacement when clamping surfaces degrade or adjustments in chuck size are required. Thus, the invention meets the specific handling needs of thin and warped dies while enhancing cost-effectiveness, flexibility, and operational efficiency in advanced packaging processes. SUMMARY The present invention provides a miniature ESC for a bonding head, designed to handle delicate semiconductor dies, including those prone to significant warpage. The miniature ESC applies an electrostatic clamping force that mitigates the effects of warpage, delivering a more uniform hold on the die surface and improving stability during semiconductor processing. This ESC is fabricated using semiconductor manufacturing processes and incorporates through-silicon via (TSV) and through-dielectric via (TDV) structures to establish effective electrical connectivity from a base silicon layer to electrodes embedded within a bulk dielectric layer and beneath a surface dielectric layer. In this process, TDVs are filled with conductive materials, such as copper or tungsten, and aligned with TSVs to facilitate reliable bias application to the electrodes, generating the electrostatic clamping force. These processes enable the ESC to be produced in customizable sizes, providing a cost-effective solution that supports various die sizes, including configurations where a single ESC can hold multiple dies simultaneously. The bias voltage required for the electrostatic clamping force is supplied by a power source integrated into a supporting structure, which may include a rechargeable battery. This configuration allows for an independent power supply, eliminating the need for external wiring and enhancing the ESC's versatility. In some implementations, the ESC can be easily attached to or detached from the support structure, facilitating quick replacement and maintenance, reducing downtime, and enabling rapid adaptation to changing die-handling needs. Additionally, alignment structures can be created on the ESC surface using semiconductor manufacturing processes to ensure precise die positioning. These alignment marks, in the form of an array, are integrated directly onto the ESC, supporting accurate and consistent die placement and further enhancing operational precision. By addressing the challenges of securely holding warped and sensitive dies with a scalable, economical, and flexible solution, the invention significantly improves cost efficiency, adaptability, and alignment precision in advanced semiconductor packaging processes. BRIEF DESCRIPTIONS OF THE DRAWINGS The accompanying drawings illustrate the following: FIG. 1: A schematic representation of an exemplary bonding head with a miniature ESC. FIG. 2: A flowchart illustrating a manufacturing process for the ESC based on a semiconductor manufacturing process. FIG. 3: A schematic diagram demonstrating the evolution of the ESC manufacturing process. FIG. 4: A schematic diagram illustrating an alignment array on the surface of the ESC for accurately placing multiple dies. FIG. 5: An example showcasing the placem