US-20260130179-A1 - ELECTRONIC CHIP COMPRISING A CRACK DETECTION DEVICE

US20260130179A1US 20260130179 A1US20260130179 A1US 20260130179A1US-20260130179-A1

Abstract

An electronic chip includes a crack detection device formed inside and on top of a substrate or on top of the substrate. The device includes a conductive path made of an alternation of lower and upper conductive strips, where each lower strip includes first and second conductive vias in contact with the lower strip, third and fourth conductive vias in contact with respectively an upper strip and another upper strip, and first and second conductive tracks respectively connecting the first and third vias and the second and fourth vias. The first and second vias are located vertically in line respectively with a first end and a second end of the lower strip, and the third and fourth vias are located vertically in line respectively with one end of the upper strip and of the other upper strip.

Inventors

Gregoire JOUAN

Assignees

STMICROELECTRONICS INTERNATIONAL N.V.

Dates

Publication Date: 20260507
Application Date: 20251105
Priority Date: 20241106

Claims (20)

1 . A crack detection device, comprising: alternating lower conductive strips and upper conductive strips connected in series, wherein connection surfaces of the conductive strips to each other are entirely located within 25% of a length of the conductive strips closest to the ends of the conductive strips.
2 . The device according to claim 1 , wherein the connection surfaces of the conductive strips to each other are entirely located within the 20% of the length of the conductive strips closest to the ends of the conductive strips.
3 . The device according to claim 1 , wherein at least 80% of a length of the device is occupied, as viewed from above, by the upper conductive strips and at least 80% of the length of the device is occupied, when viewed from below, by the lower conductive strips.
4 . The device according to claim 1 , wherein the lower conductive strips are made of a doped semiconductor material and the upper conductive strips are made of metal.
5 . The device according to claim 1 , wherein the lower conductive strips and upper conductive strips define a conductive path between first electrical connection terminal and a second electrical connection terminal, respectively. of the device.
6 . The device according to claim 5 , wherein the conductive path comprises, for each lower conductive strip: a first conductive via on top of and in contact with the lower conductive strip; a second conductive via on top of and in contact with the lower conductive strip; a third conductive via under and in contact with an overlying upper conductive strip; a fourth conductive via under and in contact with another overlying upper conductive strip; at least one first intermediate conductive track connecting the first and third conductive vias; and at least one second intermediate conductive track connecting the second and fourth conductive vias; wherein the first conductive via is located vertically in line with a first end of the lower conductive strip and the second conductive via is located in line with a second end of the lower conductive strip; and wherein the third conductive via is located vertically in line with one end of the overlying upper conductive strip and the fourth conductive via is located vertically in line with one end of the other overlying upper conductive strip.
7 . The device according to claim 6 , wherein: the first conductive via is located vertically in line with a central portion of the overlying upper conductive strip; the second conductive via is located vertically in line with a central portion of the other overlying upper conductive strip; the third conductive via is located vertically in line with a central portion of the lower conductive strip; and the fourth conductive via is located vertically in line with said central portion of the lower conductive strip.
8 . The device according to claim 7 , wherein, for each lower conductive strip, said central portion of the lower conductive strip occupies less than 50% of the length of said lower conductive strip.
9 . The device according to claim 6 , wherein: the fourth conductive via is aligned with the second conductive via; the fourth conductive via is located vertically in line with said second end of the lower conductive layer; and the second conductive via is located vertically in line with said end of the other overlying upper conductive strip.
10 . The device according to claim 9 , wherein the third conductive via is located vertically in line with an intermediate portion of the lower conductive strip located in the vicinity of the second end of the lower conductive strip, said intermediate portion being located between a central portion and the second end of the lower conductive strip.
11 . The device according to claim 6 , wherein, for each lower conductive strip, the first via is entirely located vertically in line with the 25% of the length of the strip most distant from the second end of said lower conductive strip, and the second via is entirely located vertically in line with the 25% of the length of the lower conductive strip most distant from the first end of said lower conductive strip.
12 . The device according to claim 1 , wherein the lower conductive strips are made of silicon.
13 . The device according to claim 1 , formed in and on a semiconductor substrate, wherein the semiconductor substrate comprises a doped portion of a first type of conductivity, the lower conductive strips being entirely formed in the doped portion of the semiconductor substrate.
14 . The device according to claim 1 , wherein the lower conductive strips are separated two by two by insulating trenches.
15 . The device according to claim 1 , wherein each lower conductive strip is separated from a neighboring lower conductive strip by a distance in a range from 5 nm to 10 µm.
16 . The device according to claim 1 , wherein each upper conductive strip is separated from a neighboring upper conductive strip by a distance in a range from 20 nm to 10 µm.
17 . An electronic chip comprising the crack detection device according to claim 1 , wherein the electronic chip is bounded by an edge, and the crack detection device is disposed between the edge of the electronic chip and an electronic circuit region of the electronic chip.
18 . An electronic chip, comprising: a semiconductor substrate; and a crack detection device formed inside and on top of the semiconductor substrate or on top of the semiconductor substrate; the crack detection device comprising, between first and second electrical connection terminals of the device, a serpentine conductive path comprising an alternation of lower conductive strips and of upper conductive strips connected in series; wherein the serpentine conductive path comprises, for each lower conductive strip: a first conductive via on top of and in contact with the lower conductive strip; a second conductive via on top of and in contact with the lower conductive strip; a third conductive via under and in contact with an overlying upper conductive strip; a fourth conductive via under and in contact with another overlying upper conductive strip; at least one first intermediate conductive track connecting the first and third conductive vias; and at least one second intermediate conductive track connecting the second and fourth conductive vias; wherein the first conductive via is located vertically in line with a first end of the lower conductive strip and the second conductive via is located in line with a second end of the lower conductive strip; wherein the third conductive via is located vertically in line with one end of the overlying upper conductive strip and the fourth conductive via is located vertically in line with one end of the other overlying upper conductive strip; wherein at least 80% of the length of the crack detection device is occupied, in top view, by the upper conductive strips and at least 80% of the length of the crack detection device being occupied, in bottom view, by the lower conductive strips; and wherein the lower conductive strips are made of a doped semiconductor material and the upper conductive strips are made of metal.
19 . The electronic chip according to claim 18 , wherein the conductive vias in contact with the lower conductive strips are located entirely opposite the 25% of the length of the lower conductive strips closest to each end, and wherein the conductive vias in contact with the upper conductive strips are wholly located opposite 25% of the length of the upper conductive strips closest to each end.
20 . The electronic chip according to claim 18 , wherein, for each lower conductive strip, the first via is entirely located vertically in line with the 25% of the length of the strip most distant from the second end of said lower conductive strip, and the second via is entirely located vertically in line with the 25% of the length of the lower conductive strip most distant from the first end of said lower conductive strip.

Description

PRIORITY CLAIM This application claims the priority benefit of French Application for Patent No. FR2412129, filed on November 6, 2024, the content of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law. TECHNICAL FIELD The present disclosure generally concerns electronic chips or integrated circuits and, in particular, an electronic chip comprising a crack detection device, for example integrated in a seal ring. BACKGROUND In industry, most electronic devices are manufactured in series. A plurality of electronic chips are thus usually manufactured inside and on top of a same semiconductor substrate, for example a same semiconductor wafer. The electronic chips can then be separated, or individualized or singulated, to be able to be used, for example, alone or in an electronic device comprising other components. This individualization is usually performed by cutting, for example by means of a saw. During this individualization, for example during the cutting of a semiconductor wafer, a crack may form at one edge of a chip and propagate into the chip. Such a crack may lead to a failure of the electronic circuits of the electronic chip. Further, cracks may form during the lifetime of the chip, in particular at one edge of the chip, for example due to temperature changes of the electronic chip. To protect an electronic chip, in particular during the manufacturing, the individualization, or during its use, the electronic chip may include a seal ring at its periphery. A purpose of the seal ring is to prevent the propagation of cracks from the edge to a region of electronic circuits of the chip. A purpose of the seal ring also is to prevent the penetration of moisture into the active regions of the chip. However, the seal ring does not always prevent the forming and the propagation of cracks in the electronic chip. Thus, a chip may comprise a crack detection device, for example incorporated in a seal ring. The crack detection device can be used to test the integrity of the chip upon manufacturing, for example after the cutting step, or during the use of the chip. It would be desirable to be able to improve, at least partly, electronic chips, and in particular crack detection devices incorporated in electronic chips. SUMMARY In an embodiment, an electronic chip comprises: a semiconductor substrate and a crack detection device formed inside and on top of the semiconductor substrate or on the semiconductor substrate, the crack detection device comprising, between first and second electrical connection terminals of the device, a serpentine conductive path comprising an alternation of lower conductive strips and of upper conductive strips connected in series, wherein the conductive path comprises, for each lower conductive strip: a first conductive via on top of and in contact with the lower conductive strip, a second conductive via on top of and in contact with the lower conductive strip, a third conductive via under and in contact with an overlying upper conductive strip, a fourth conductive via under and in contact with another overlying upper conductive strip, at least one first intermediate conductive track connecting the first and third conductive vias, and at least one second intermediate conductive track connecting the second and fourth conductive vias, the first conductive via being located vertically in line with a first end of the lower conductive strip and the second conductive via being located vertically in line with a second end of the lower conductive strip, the third conductive via being located vertically in line with an end of the overlying upper conductive strip, and the fourth conductive via being located vertically in line with an end of the other overlying upper conductive strip, at least 80% of the length of the crack detection device being occupied, in top view, by the upper conductive strips and at least 80% of the length of the crack detection device being occupied, in bottom, by the lower conductive strips, and wherein the lower conductive strips are made of a doped semiconductor material and the upper conductive strips are made of metal. According to an embodiment, in the crack detection device: the first conductive via is located vertically in line with a central portion of the overlying upper conductive strip; the second conductive via is located vertically in line with a central portion of the other overlying upper conductive strip; the third conductive via is located vertically in line with a central portion of the lower conductive strip; and the fourth conductive via is located vertically in line said central portion of the lower conductive strip. According to an embodiment, in the crack detection device, the fourth conductive via is aligned with the second conductive via, the fourth conductive via being located vertically in line with said second end of the lower conductive layer and the second conductive via being located vertically in line