US-20260130182-A1 - DIELECTRIC ISOLATION STRUCTURES AND METHODS OF MAKING SAME

US20260130182A1US 20260130182 A1US20260130182 A1US 20260130182A1US-20260130182-A1

Abstract

In a method for forming a dielectric isolation structure or container, ion implantation is performed to form a buried implant region in a base semiconductor material. Trenches are formed in the base semiconductor material that access the buried implant region. The buried implant region is removed by etching via the trenches to form a lateral undercut region connected with the trenches. The lateral undercut region and the trenches are filled with dielectric material to form a dielectric bottom region and annular dielectric sidewall of the dielectric isolation structure. By forming of the trenches and the filling of the trenches in two or more iterations, with the removal of the buried implant region being performed after one of these iterations, detachment and self-collapse of the contained portion of base semiconductor material is avoided.

Inventors

Chun-Shan Lee
Chung-Chuan Tseng
MENG CHI HANG
Chien-Lin Tseng

Assignees

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Dates

Publication Date: 20260507
Application Date: 20241101

Claims (20)

1 . An isolation method comprising: performing ion implantation to form a buried implant region in a base semiconductor material; forming first trenches in the base semiconductor material accessing the buried implant region; removing the buried implant region by performing etching through the first trenches to form a lateral undercut region connected with the first trenches; filling the lateral undercut region and the first trenches with a first dielectric material to form a bottom and first sidewall portions of a dielectric isolation structure; completing an encircling sidewall of the dielectric isolation structure by performing at least one instance of forming additional trenches in the base semiconductor material accessing the bottom of the dielectric isolation structure and filling the additional trenches with an additional dielectric material to form additional sidewall portions of the dielectric isolation structure; wherein the first sidewall portions and the additional sidewall portions of the dielectric isolation structure form the encircling sidewall of the dielectric isolation structure which is connected with the bottom of the dielectric isolation structure.
2 . The isolation method of claim 1 , wherein: the forming of the first trenches and the forming of the additional trenches comprises forming the first trenches and the additional trenches by photolithographically defined dry etching; and the removing of the buried implant region by performing etching through the first trenches comprises removing the buried implant region by performing wet chemical etching or chemical dry etching through the first trenches.
3 . The isolation method of claim 2 , wherein: the filling of the lateral undercut region and the first trenches with the first dielectric material comprises chemical vapor deposition of the first dielectric material followed by chemical mechanical polishing; and the filling of the additional trenches with the additional dielectric material comprises chemical vapor deposition of the additional dielectric material followed by chemical mechanical polishing.
4 . The isolation method of claim 1 , wherein the completing of the encircling sidewall of the dielectric isolation structure includes: forming first additional trenches accessing the bottom of the dielectric isolation structure and filling the first additional trenches with first additional dielectric material to form first additional sidewall portions of the dielectric isolation structure; and forming second additional trenches accessing the bottom of the dielectric isolation structure and filling the second additional trenches with second additional dielectric material to form second additional sidewall portions of the dielectric isolation structure; wherein the first sidewall portions, the first additional sidewall portions, and the second additional sidewall portions of the dielectric isolation structure form the encircling sidewall of the dielectric isolation structure which is connected with the bottom of the dielectric isolation structure.
5 . The isolation method of claim 1 , wherein one of: the additional dielectric material is the same as the first dielectric material; or the additional dielectric material is different from the first dielectric material.
6 . The isolation method of claim 1 , wherein: the first dielectric material comprises silicon oxide, silicon carbide, silicon nitride, or a low-k dielectric material having a dielectric constant lower than the dielectric constant of SiO 2 ; and the additional dielectric material comprises silicon oxide, silicon carbide, silicon nitride, or a low-k dielectric material having a dielectric constant lower than the dielectric constant of SiO 2 .
7 . The isolation method of claim 1 , further comprising: forming at least one electronic component in a portion of the base semiconductor material contained in the dielectric isolation structure, wherein the at least one electronic component is isolated from a remainder of the base semiconductor material by the dielectric isolation structure.
8 . The isolation method of claim 1 , wherein the ion implantation forms the buried implant region in the base semiconductor material with an ion dose of at least 10 15 cm - 3 .
9 . The isolation method of claim 1 , wherein the first sidewall portions and the additional sidewall portions of the dielectric isolation structure are in contact with one another to form the encircling sidewall of the dielectric isolation structure, and the encircling sidewall is in contact with the bottom of the dielectric isolation structure.
10 . An isolation method comprising: performing ion implantation to form a buried implant region in a base semiconductor material; forming trenches in the base semiconductor material accessing the buried implant region; removing the buried implant region by performing etching through the trenches to form a lateral undercut region connected with the trenches; and filling the lateral undercut region and the trenches with dielectric material to form a dielectric bottom region and annular dielectric sidewall of a dielectric isolation structure.
11 . The isolation method of claim 10 , wherein: the forming of the trenches and the filling of the trenches is performed in two or more iterations; and the removing of the buried implant region is performed after one of the iterations of the forming of the trenches.
12 . The isolation method of claim 11 , wherein the two or more iterations of the filling of the trenches includes filling the different trenches with at least two different dielectric materials.
13 . The isolation method of claim 10 , wherein the filling the lateral undercut region and the trenches with dielectric material includes filling the lateral undercut region and the trenches with one or more dielectric materials selected from a group consisting of: silicon oxide, silicon carbide, silicon nitride, or a low-k dielectric material having a dielectric constant lower than the dielectric constant of SiO 2 .
14 . The isolation method of claim 10 , wherein the forming: the trenches are formed by photolithographically defined dry etching; the etching performed to remove of the buried implant region comprises wet chemical etching or chemical dry etching through the trenches; and the lateral undercut region and the trenches are filled with dielectric material by chemical vapor deposition.
15 . The isolation method of claim 10 , further comprising: forming at least one electronic component in a portion of the base semiconductor material contained in the dielectric isolation structure, wherein the at least one electronic component is isolated from a remainder of the base semiconductor material by the dielectric isolation structure.
16 . A structure comprising: a bottom region comprising a dielectric material; and an encircling dielectric sidewall made of two or more different dielectric materials; wherein the encircling dielectric sidewall is connected with the dielectric bottom region.
17 . The structure of claim 16 , wherein the bottom region and the encircling dielectric sidewall form a dielectric container structure entirely consisting of dielectric material.
18 . The structure of claim 16 , wherein the encircling dielectric sidewall comprises sidewall portions alternating between the two or more different dielectric materials going around the encircling dielectric sidewall.
19 . The structure of claim 16 , wherein the dielectric bottom region comprises a single dielectric material which is one of the two or more different dielectric materials of the sidewall portions.
20 . A structure comprising: a grid of unit structures, each unit structure being a structure as set forth in claim 16 ; wherein the bottom regions of the unit structures of the grid of unit structures form a common bottom region of the grid of unit structures; and wherein the encircling dielectric sidewalls of neighboring unit structures of the grid of unit structures are shared.

Description

BACKGROUND The following relates to integrated circuits (ICs), IC fabrication processes, isolation structures for IC devices and (sub-)circuits, and the like. For proper IC operation, constituent electronic components (e.g., single electronic devices, or sub-circuits of the IC) may be electrically isolated from one another to avoid deleterious interactions. Providing such isolation can be challenging. The following discloses dielectric isolation structures with certain advantages as disclosed herein. BRIEF DESCRIPTION OF THE DRAWINGS Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. FIG. 1 diagrammatically illustrates an isolation perspective view of a dielectric isolation structure and an electronic component disposed in the dielectric isolation structure. FIG. 2 diagrammatically illustrate a cut view of the dielectric isolation structure and electronic component of FIG. 1, further including representative surrounding base semiconductor material. FIG. 3 diagrammatically illustrates a perspective view of a photolithographically defined buried implant region formed during fabrication of the dielectric isolation structure of FIGS. 1 and 2. FIG. 4 diagrammatically shows the perspective view of the buried implant region of FIG. 3, with a mapped diagrammatic side sectional view illustrating a typical implanted dopant profile for the buried implant region. FIGS. 5A and 5B diagrammatically illustrate top and cut views, respectively, of the dielectric isolation structure under fabrication after forming a photolithographically defined buried implant region and a first deep trench etching step. FIGS. 6A and 6B diagrammatically illustrate top and cut views, respectively, of the dielectric isolation structure under fabrication of FIGS. 5A and 5B after a further lateral etching step that removes the photolithographically defined buried implant region. FIGS. 7A and 7B diagrammatically illustrate top and cut views, respectively, of the dielectric isolation structure under fabrication of FIGS. 6A and 6B after further steps of first insulator deposition and first chemical mechanical polishing (CMP). FIGS. 8A and 8B diagrammatically illustrate top and cut views, respectively, of the dielectric isolation structure under fabrication of FIGS. 7A and 7B after a second deep trench etching step. FIGS. 9A and 9B diagrammatically illustrate top and cut views, respectively, of the dielectric isolation structure of FIGS. 8A and 8B after further steps of second insulator deposition and second CMP. FIGS. 10A and 10B diagrammatically illustrate top views of variant dielectric isolation structures in which the cross-sections of the deep trenches formed in the first and second deep trench etching steps are of different size and shape. FIG. 11 diagrammatically illustrates top views of variant dielectric isolation structures in which a photolithographic overlay (OVL) for the second deep trench etching step is shifted relative to the photolithographic overlay for the first deep trench etching step. FIG. 12 diagrammatically illustrates a top view of a variant dielectric isolation structure fabricated using three deep trench etching steps, with the cross-sections of the deep trenches formed in the first, second, and third deep trench etching steps being of different size and shape. FIGS. 13A and 13B diagrammatically illustrate top and cut views, respectively, of a dielectric isolation structure grid employing unit cell isolation structures of FIGS. 9A and 9B with a common bottom portion and shared sidewalls. DETAILED DESCRIPTION The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to desc