US-20260130216-A1 - SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SAME

US20260130216A1US 20260130216 A1US20260130216 A1US 20260130216A1US-20260130216-A1

Abstract

A semiconductor device and a method for fabricating it are disclosed. In the method, second and first substrates are bonded to obtain increased operating efficiency. Moreover, a heat dissipation unit, which includes a heat-dissipating semiconductor layer and a first heat-dissipating metal channel extending through the heat-dissipating semiconductor layer and dielectric layers on a surface thereof, is bonded to a surface of the first substrate to accelerate dissipation of heat generated during operation of the second and first substrates, imparting improved heat dissipation capacities to the semiconductor device.

Inventors

Hang Yan
Beibei SHENG
Sheng Hu

Assignees

WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD.

Dates

Publication Date: 20260507
Application Date: 20251028
Priority Date: 20241104

Claims (14)

1 . A semiconductor device, comprising: a first substrate and at least one second substrate bonded to the first substrate; and a heat dissipation unit bonded to a surface of the first substrate, wherein the heat dissipation unit comprises: a heat-dissipating semiconductor layer; at least one dielectric layer stacked on at least one surface of the heat-dissipating semiconductor layer; and a first heat-dissipating metal channel extending through the heat-dissipating semiconductor layer and the at least one dielectric layer in a thickness direction.
2 . The semiconductor device of claim 1 , wherein the first substrate is a silicon interposer, or a data processing substrate, and at least one second substrate is a memory unit with a stacked structure.
3 . The semiconductor device of claim 1 , wherein at least one second substrate comprises a second heat-dissipating metal channel extending therethrough along a thickness thereof.
4 . The semiconductor device of claim 1 , wherein the first substrate comprises two opposite surfaces, wherein the second substrate and the heat dissipation unit are spaced apart and bonded to a same surface of the first substrate, or wherein the second substrate and the heat dissipation unit are bonded to the two surfaces of the first substrate.
5 . The semiconductor device of claim 4 , wherein the first substrate further comprises: a bond material layer bonded to the second substrate and the heat dissipation unit; and at least one heat-dissipating metal structure disposed in the bond material layer.
6 . The semiconductor device of claim 5 , wherein the heat-dissipating metal structure comprises a heat-dissipating metal layer formed in the bond material layer, a heat-dissipating bond pad embedded in a surface of the bond material layer and a heat-dissipating plug connecting the heat-dissipating metal layer and the heat-dissipating bond pad.
7 . The semiconductor device of claim 5 , wherein the first heat-dissipating metal channel is connected to the heat-dissipating metal structure.
8 . The semiconductor device of claim 1 , further comprising: an encapsulation layer, that covers the second substrate, the heat dissipation unit and the first substrate and fills gaps therebetween; and a heat-conducting layer and a heat-dissipating metal sheet, sequentially stacked on a surface of the encapsulation layer.
9 . A method for fabricating a semiconductor device, comprising: dicing a heat-conducting substrate formed from a semiconductor substrate to obtain at least one heat dissipation unit, wherein the heat dissipation unit comprises: a heat-dissipating semiconductor layer made up of the semiconductor substrate; at least one dielectric layer stacked on at least one surface of the heat-dissipating semiconductor layer; and a first heat-dissipating metal channel extending through the semiconductor substrate layer and the at least one dielectric layer in a thickness direction; bonding and interconnecting at least one second substrate with a first substrate; and bonding at least one heat dissipation unit to a surface of the first substrate.
10 . The method of claim 9 , wherein the formation of the heat-conducting substrate comprises: forming a first dielectric layer on the semiconductor substrate, forming a first heat-dissipating metal layer on a surface of the first dielectric layer, forming a second dielectric layer covering the first dielectric layer and the first heat-dissipating metal layer, forming at least one first through hole extending through the second dielectric layer and exposing the first heat-dissipating metal layer, forming at least one first bond pad opening by widening an upper portion of the first through hole; filling a metal material in the first through hole and the first bond pad opening to form a first heat-dissipating plug and a first heat-dissipating bond pad, bonding a first carrier to a side of the second dielectric layer away from the semiconductor substrate and thinning the semiconductor substrate from a side thereof away from the first carrier; forming a third dielectric layer on the thinned surface of the semiconductor substrate, forming at least one second through hole that extends through the third dielectric layer, the semiconductor substrate and the first dielectric layer and exposes the first heat-dissipating metal layer; and filling a metal material in the second through hole to form a second heat-dissipating plug, wherein the second heat-dissipating plug, the first heat-dissipating metal layer, the first heat-dissipating plug and the first heat-dissipating bond pad constitute the first heat-dissipating metal channel.
11 . The method of claim 9 , wherein at least one second substrates comprise a stacked structure, wherein formation of the second substrate with the stacked structure comprises: stacking and interconnecting at least two base substrates to obtain a three-dimensional (3D) substrate stack; and dicing the 3D substrate stack.
12 . The method of claim 11 , wherein the formation of the 3D substrate stack comprises: providing a first base substrate comprising a front side and an opposite backside; forming a fourth dielectric layer on the front side of the first substrate, in the fourth dielectric layer, forming a first redistribution layer, at least one first interconnect bond pad and at least one first via connecting the first redistribution layer and the first interconnect bond pad; bonding a second carrier to the fourth dielectric layer and thinning the first base substrate from the backside; forming a fifth dielectric layer on the thinned backside of the first base substrate, forming at least one second via extending through the fifth dielectric layer, the first base substrate and the fourth dielectric layer and connected to the first redistribution layer; forming a sixth dielectric layer on the fifth dielectric layer, forming, in the sixth dielectric layer, a second redistribution layer, at least one second interconnect bond pad and at least one third via connecting the second redistribution layer and the second interconnect bond pad; and bonding and connecting the first base substrate to the second base substrate.
13 . The method of claim 12 , wherein the formation of the 3D substrate stack further comprises: during the formation of the first redistribution layer, the first interconnect bond pad and the first via, forming, in the fourth dielectric layer, a second heat-dissipating metal layer, at least one second heat-dissipating bond pad and at least one third heat-dissipating plug connecting the second heat-dissipating metal layer and the second heat-dissipating bond pad; during the formation of the second via connected to the first redistribution layer, forming at least one fourth heat-dissipating plug extending through the fifth dielectric layer, the first substrate and the fourth dielectric layer and connected to the second heat-dissipating metal layer; and during the formation of the second redistribution layer, the second interconnect bond pad and the third via, forming, in the sixth dielectric layer, a third heat-dissipating metal layer, at least one third heat-dissipating bond pad and at least one fifth heat-dissipating plug connecting the third heat-dissipating metal layer and the third heat-dissipating bond pad, wherein the second heat-dissipating metal layer, the second heat-dissipating bond pad, the third heat-dissipating plug, the fourth heat-dissipating plug, the third heat-dissipating metal layer, the third heat-dissipating bond pad and the fifth heat-dissipating plug constitute a second heat-dissipating metal channel.
14 . The method of claim 9 , further comprising, before bonding and interconnecting the first base substrate to the second base substrate, forming a bond material layer on a surface of the first substrate, at which the bonding is to be conducted, and forming at least one heat-dissipating metal structure in the bond material layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims the priority of Chinese patent application number 202411563659.8, filed on Nov. 4, 2024, and entitled “SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SAME”, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD The present invention relates to the field of semiconductor technology and, in particular, to a semiconductor device and a method for fabricating it. BACKGROUND Data processing power (or computing power) of semiconductor chips has made important contribution to the booming of artificial intelligence (AI), big data and related techniques. As these techniques continue to develop rapidly, increasingly demanding requirements are being placed on the computing power of related semiconductor chips. Vertically interconnecting multiple dies can result in a higher level of integration, a shorter global wiring length, accelerated interconnection speed, faster response and lower energy consumption. For example, a substrate with large storage capacity may be obtained by vertically interconnecting multiple dies and then packaged with a data processing substrate into a 3D integrated device (such as a chip). With this arrangement, due to physical proximity between the two substrates, data can be processed more efficiently with less transfer delays and reduced power consumption. However, the increasing level of integration of such 3D integrated devices brings about more significant heat generation during operation, making heat dissipation one of the core problems that adversely impact their performance. SUMMARY OF THE INVENTION The present invention provides a 3D integrated semiconductor device with high operating efficiency and improved heat dissipation capabilities and a method for fabricating such a device. In one aspect, the present invention provides a semiconductor device comprising: a first substrate and at least one second substrate bonded to the first substrate; anda heat dissipation unit bonded to a surface of the first substrate, the heat dissipation unit comprising: a heat-dissipating semiconductor layer; at least one dielectric layer stacked on at least one surface of the heat-dissipating semiconductor layer; and a first heat-dissipating metal channel extending through the heat-dissipating semiconductor layer and the at least one dielectric layer in a thickness direction. Optionally, the first substrate may be a silicon interposer, or a data processing substrate, and the at least one second substrate may be a memory unit with a stacked structure. Optionally, at least one second substrate may comprise a second heat-dissipating metal channel extending therethrough along a thickness thereof. Optionally, the first substrate may comprise two opposite surfaces, wherein the second substrate and the heat dissipation unit are spaced apart and both bonded to a same surface of the first substrate, or wherein the second substrate and the heat dissipation unit are bonded to the two surfaces. Optionally, the first substrate may further comprise: a bond material layer bonded to the second substrate and the heat dissipation unit; andat least one heat-dissipating metal structure disposed in the bond material layer. Optionally, the heat-dissipating metal structure may comprise a heat-dissipating metal layer formed in the bond material layer, a heat-dissipating bond pad embedded in a surface of the bond material layer and a heat-dissipating plug connecting the heat-dissipating metal layer and the heat-dissipating bond pad. Optionally, the first heat-dissipating metal channel may be connected to the heat-dissipating metal structure. Optionally, the semiconductor device may further comprise: an encapsulation layer, which covers the second substrate, the heat dissipation unit and the first substrate and fills any gap therebetween; anda heat-conducting layer and a heat-dissipating metal sheet, which are sequentially stacked on a surface of the encapsulation layer. In another aspect, the present invention provides a method for fabricating a semiconductor device, which comprises: dicing a heat-conducting substrate formed from a semiconductor substrate to obtain at least one heat dissipation unit, wherein the heat dissipation unit comprises: a heat-dissipating semiconductor layer made up of the semiconductor substrate; at least one dielectric layer stacked on at least one surface of the heat-dissipating semiconductor layer; and a first heat-dissipating metal channel extending through the semiconductor substrate layer and the at least one dielectric layer in a thickness direction; andbonding and interconnecting at least one second substrate with a first substrate and bonding at least one heat dissipation unit to a surface of the first substrate. Optionally, the formation of the heat-conducting substrate may comprise: forming a first dielectric layer on the semiconductor substrate and forming a first heat-dissipating metal layer on a surfac