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US-20260130231-A1 - SUBSTRATE HAVING A METAL LAYER COMPRISING A MARKING

US20260130231A1US 20260130231 A1US20260130231 A1US 20260130231A1US-20260130231-A1

Abstract

A method of marking information on a substrate for use in a semiconductor component is provided. The method comprises providing a substrate for use in a semiconductor component, providing a metal layer on a surface of the substrate, and providing a marking within the metal layer. A method of making a die, a radio-frequency module and a wireless mobile device; as well as a substrate, a die, a radio-frequency module and a wireless mobile device is also provided.

Inventors

  • Atsushi Takano
  • Mitsuhiro Furukawa

Assignees

  • SKYWORKS SOLUTIONS, INC.

Dates

Publication Date
20260507
Application Date
20251105

Claims (20)

  1. 1 .- 19 . (canceled)
  2. 20 . A die comprising: a device wafer having an electronic component disposed thereon; and a cap wafer bonded to the device wafer such that the electronic component is located between the device wafer and the cap wafer, the cap wafer having a metal layer on the inner surface of the cap wafer, the metal layer comprising a marking formed in a photoresist layer deposited on the metal layer.
  3. 21 . The die of claim 20 , wherein the die is integrated into a semiconductor component.
  4. 22 . The die of claim 20 , wherein the marking is provided on the inner surface of the cap wafer.
  5. 23 . The die of claim 20 , wherein the device wafer includes a plurality of electronic components arranged in groups of one or more electronic components, each group corresponding to a separate die, the metal layer including the marking corresponding to each group.
  6. 24 . The die of claim 23 , wherein the marking corresponding to each group is provided on the inner surface of the cap wafer opposite the one or more electronic components of the corresponding group.
  7. 25 . The die of claim 20 , wherein the electronic component includes one or more of a bulk acoustic wave resonator, a Lamb wave resonator, and a surface acoustic wave resonator.
  8. 26 . The die of claim 20 , wherein the inner surface of the substrate is a surface of a silicon wafer or a treated surface of a silicon wafer.
  9. 27 . The die of claim 20 , wherein the marking includes one or more holes in the metal layer extending through the entire thickness of the metal layer.
  10. 28 . The die of claim 20 , wherein the marking is fabricated from a masking layer over a portion of the photoresist layer, the masking layer being in the shape of the marking.
  11. 29 . The die of claim 20 , wherein the marking includes at least one character and/or symbol, the at least one character and/or symbol including a top row of letters and a bottom row of letters and numbers.
  12. 30 . The die of claim 20 , wherein the marking includes a lot number and a wafer number that the die is from.
  13. 31 . The die of claim 30 , wherein the marking further includes a position of the die on the wafer.
  14. 32 . The die of claim 20 , wherein the marking includes a polarity of the die, and is configured to orient the die position of the die for connecting to other components.
  15. 33 . The die of claim 20 , wherein the marking includes information on the position of each die on the wafer.
  16. 34 . The die of claim 33 , wherein the information is in the form of x and y coordinates.
  17. 35 . The die of claim 33 , wherein the information includes at least one of a marking includes at least one of a product identification, a lot identification, or a wafer identification.
  18. 36 . The die of claim 20 , wherein the bonding of the cap wafer and the device wafer form a hermetic seal around the electronic component.
  19. 37 . The die of claim 20 , wherein the marking includes one or more letters and/or numbers and each of the letters and/or numbers being formed backwards on the inner surface of the cap wafer such that when viewed through the cap wafer from an outer surface opposite the inner surface each of the letters and/or numbers are correctly oriented.
  20. 38 . A die comprising: a device wafer having an electronic component disposed thereon; and a cap wafer bonded to the device wafer with the electronic component being disposed between the device wafer and the cap wafer, the cap wafer having a metal layer on the inner surface of the cap wafer, the metal layer comprising a marking provided on an inner surface of the cap wafer, the bonding of the cap wafer and the device wafer forming a hermetic seal around the electronic component.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority under 35 U.S.C. § 121 as a division of U.S. patent application Ser. No. 17/950,243, titled “SUBSTRATE HAVING A METAL LAYER COMPRISING A MARKING,” filed Sep. 22, 2022, which claims priority under 35 U.S.C. § 119(e) to U.S. Provisional Patent Application Ser. No. 63/251,183, titled “SUBSTRATE HAVING A METAL LAYER COMPRISING A MARKING,” filed Oct. 1, 2021, each of which is incorporated herein by reference for all purposes. BACKGROUND Field Embodiments of the invention relate to a substrate, and methods of manufacturing the same, having a metal layer comprising a marking provided on a surface. Embodiments of the invention also relate to dies, radio-frequency modules and wireless mobile devices, and methods of their manufacture. Description of the Related Technology Microchips and other types of electronic circuit typically comprise a number of electronic components mounted on a substrate, such as a silicon wafer. These are required to be marked, e.g., with human or machine comprehensible characters, for a number of reasons. For example, silicon chips, or die, used in various electronic components such as radio-frequency front end (RFFE) modules are often made in large batches as part of an assembly line. To ensure quality control and to enable bad batches of die or problematic manufacturing processes to be identified, identifying markings are provided on die. This is done using a laser to etch a marking onto an external surface of the die, typically on an external surface of a silicon wafer upon which the electronic components are provided (i.e., a device wafer) or on an external surface of a silicon wafer disposed over the electronic components and bonded to the device wafer (i.e., a cap wafer). However, laser etchings are prone to being accidentally removed or made un-readable, for example during a grinding step of a failure analysis process. Such a process may be used if a fault or other problem is detected in an assembled module (i.e., a fault with a component within an assembled module having a device and cap wafer encasing the component). Furthermore, laser etched markings can only be reduced to a minimum size. As developments in manufacturing technology continue, die have become smaller and smaller, meaning that the amount of information (e.g., the number of letters or numbers) that can be etched onto a die is reduced. The available area for marking a chip is further reduced due to the need to have a buffer area around the edge of the die, which can become damaged during manufacture of the die. For example, it may chip during a cutting step. The available area for marking is further limited due to the inaccuracy of laser etching systems, often requiring a relatively large buffer region to ensure that the marking is etched fully on the die. SUMMARY According to one embodiment there is provided a method of marking information on a substrate for use in a semiconductor component, the method comprising: providing a substrate for use in a semiconductor component, providing a metal layer on a surface of the substrate, and providing a marking within the metal layer. In an example, the method further comprises the step of integrating the substrate into a semiconductor component. In an example, the surface of the substrate is a surface of a silicon wafer or a treated surface of a silicon wafer. In an example, the marking comprises one or more holes in the metal layer extending through the entire thickness of the metal layer. In an example, the marking comprises one or more characters. In an example, the marking comprises one or more letters and/or numbers. In an example, the resolution of the marking is 10 μm. In an example, the steps of providing a metal layer on a surface of the substrate and providing a marking within the metal layer include: providing a photoresist in the shape of the marking on the surface of the substrate, and depositing the metal layer around the photoresist to form the metal layer comprising the marking. In an example, the photoresist in the shape of the marking on the surface of the substrate is provided by: providing photoresist over the surface of the substrate, providing a masking layer over a portion of the photoresist, the masking layer being in the shape of the marking, and developing the photoresist to remove portions of the photoresist not covered by the masking layer, such that the remaining photoresist is in the shape of the marking. In an example, providing a metal layer on a surface of the substrate such that the metal layer comprises a marking includes: depositing a metal layer on the surface of the substrate, and removing portions of the metal layer such that the metal layer comprises the marking. In an example, portions of the metal layer are removed by: providing a masking layer over the metal layer on the surface of the substrate, the masking layer comprising an outline of the marking, and removing t