US-20260130234-A1 - SEMICONDUCTOR DEVICE ASSEMBLIES WITH DIE ADHESIVE OUTFLOW BARRIERS

Abstract

In a general aspect, a semiconductor device assembly includes a conductive member, a conductive adhesive disposed on the conductive member, and a semiconductor die disposed on the conductive adhesive. The conductive adhesive couples the semiconductor die with the conductive member. The device assembly further includes a barrier included in the conductive member. The barrier is proximate to an edge of the semiconductor die and configured to inhibit outflow of the conductive adhesive.

Inventors

• Sixin JI
• Jie Chang
• Yanghai TIAN
• KeunHyuk Lee
• Gyuwan HAN
• Jeonghyuk Park

Assignees

• SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Dates

Publication Date

20260507

Application Date

20241104

Claims (20)

1. 1 . A semiconductor device assembly comprising: a conductive member; a conductive adhesive disposed on the conductive member; a semiconductor die disposed on the conductive adhesive, the conductive adhesive coupling the semiconductor die with the conductive member; and a barrier included in the conductive member, the barrier being proximate to an edge of the semiconductor die and configured to inhibit outflow of the conductive adhesive.
2. 2 . The semiconductor device assembly of claim 1 , wherein: the conductive adhesive is a first conductive adhesive; the semiconductor die is a first semiconductor die; and the barrier defines, and is disposed between: a first die attach surface of the conductive member; and a second die attach surface of the conductive member, the first semiconductor die being coupled with the first die attach surface, the semiconductor device assembly further comprising: a second conductive adhesive disposed on the second die attach surface proximate the barrier; and a second semiconductor die disposed on the second conductive adhesive, the second conductive adhesive coupling the second semiconductor die with the second die attach surface.
3. 3 . The semiconductor device assembly of claim 1 , wherein the barrier includes a groove formed in the conductive member.
4. 4 . The semiconductor device assembly of claim 1 , wherein the barrier includes a plurality of grooves formed in the conductive member.
5. 5 . The semiconductor device assembly of claim 1 , wherein the barrier includes a protrusion extending from a surface of the conductive member.
6. 6 . The semiconductor device assembly of claim 5 , wherein the protrusion is monolithically formed with the conductive member.
7. 7 . The semiconductor device assembly of claim 5 , wherein the protrusion includes a solder resistor disposed on and coupled with the conductive member, the solder resistor having a melting point that is greater than a melting point of the conductive adhesive.
8. 8 . The semiconductor device assembly of claim 5 , wherein the protrusion includes a wire-bond tail.
9. 9 . The semiconductor device assembly of claim 5 , wherein the protrusion is a first protrusion, the barrier including a plurality of protrusions.
10. 10 . The semiconductor device assembly of claim 1 , wherein the edge of the semiconductor die is a first edge of the semiconductor die, the barrier being further proximate to at least one of: a second edge of the semiconductor die; a third edge of the semiconductor die; or a fourth edge of the semiconductor die.
11. 11 . The semiconductor device assembly of claim 1 , wherein the conductive member is a die attach paddle of a leadframe.
12. 12 . The semiconductor device assembly of claim 1 , wherein the conductive member is a metal layer of a direct-bonded metal substrate.
13. 13 . The semiconductor device assembly of claim 1 , wherein the barrier physically blocks outflow of the conductive adhesive.
14. 14 . The semiconductor device assembly of claim 1 , wherein the barrier collects outflow of the conductive adhesive.
15. 15 . The semiconductor device assembly of claim 1 , further comprising a molding compound encapsulating the semiconductor die, the conductive adhesive and at least a portion of the conductive member.
16. 16 . The semiconductor device assembly of claim 1 , wherein the conductive adhesive is one of a solder material or a sintering material having a melting point of greater than or equal to 300° Celsius.
17. 17 . A semiconductor device assembly comprising: a conductive member having a primary surface arranged along a transverse axis and a longitudinal axis; a barrier included in the conductive member, the barrier being arranged along the transverse axis and extending from a first edge of the conductive member to a second edge of the conductive member opposite the first edge, the barrier dividing the primary surface into a first die attach surface and a second die attach surface; a first conductive adhesive disposed on the first die attach surface proximate the barrier; a first semiconductor die disposed on the first conductive adhesive, the first conductive adhesive coupling the first semiconductor die with the first die attach surface; a second conductive adhesive disposed on the second die attach surface proximate the barrier; and a second semiconductor die disposed on the second conductive adhesive, the second conductive adhesive coupling the second semiconductor die with the second die attach surface, the barrier being configured to inhibit bridging of the first conductive adhesive with the second conductive adhesive.
18. 18 . The semiconductor device assembly of claim 17 , wherein the barrier includes at least one groove formed in the conductive member on the primary surface of the conductive member.
19. 19 . The semiconductor device assembly of claim 17 , wherein the barrier includes at least one protrusion extending from the primary surface of the conductive member.
20. 20 . The semiconductor device assembly of claim 17 , wherein the conductive member is one of: a die attach paddle of a leadframe; or a metal layer of a direct-bonded metal substrate.

Description

SUMMARY In a general aspect, a semiconductor device assembly includes a conductive member, a conductive adhesive disposed on the conductive member, and a semiconductor die disposed on the conductive adhesive. The conductive adhesive couples the semiconductor die with the conductive member. The device assembly further includes a barrier included in the conductive member. The barrier is proximate to an edge of the semiconductor die and configured to inhibit outflow of the conductive adhesive. In another general aspect, a semiconductor device assembly includes a conductive member having a primary surface arranged along a transverse axis and a longitudinal axis, and a barrier included in the conductive member. The barrier is arranged along the transverse axis and extends from a first edge of the conductive member to a second edge of the conductive member opposite the first edge. The barrier divides the primary surface into a first die attach surface and a second die attach surface. The device assembly further includes a first conductive adhesive disposed on the first die attach surface proximate the barrier, and a first semiconductor die disposed on the first conductive adhesive. The first conductive adhesive couples the first semiconductor die with the first die attach surface. The device assembly also includes a second conductive adhesive disposed on the second die attach surface proximate the barrier, and a second semiconductor die disposed on the second conductive adhesive. The second conductive adhesive couples the second semiconductor die with the second die attach surface. The barrier is configured to inhibit bridging of the first conductive adhesive with the second conductive adhesive. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram illustrating an example leadframe including an outflow barrier. FIG. 2 is a diagram schematically illustrating a cross-sectional view of a conductive member of the leadframe of FIG. 1 with a plurality of semiconductor die and corresponding die attach adhesive. FIGS. 2A to 2G are diagrams schematically illustrating example outflow barriers. FIGS. 3A to 3C are diagrams schematically illustrating examples of barriers blocking and/or impeding outflow of die attach adhesive outflow in respective semiconductor device assemblies. FIG. 4 is a flowchart including schematic diagrams illustrating an example process flow for producing a semiconductor device assembly. FIGS. 5A and 5B are diagrams illustrating, respectively, top and side views of an example semiconductor device assembly including outflow barriers. FIGS. 6A and 6B are diagrams illustrating, respectively, top and side views of another example semiconductor device assembly including outflow barriers. FIG. 7A is a magnified view of a portion of the semiconductor device assembly of FIGS. 5A and 5B. FIG. 7B is a magnified view of a portion of the semiconductor device assembly of FIGS. 6A and 6B. FIG. 8A is a further magnified view of a portion of the semiconductor assembly shown in FIG. 7A after molding compound encapsulation. FIG. 8B is a further magnified view of a portion of the semiconductor assembly shown in FIG. 7B after molding compound encapsulation. In the drawings, which are not necessarily drawn to scale, like reference labels may indicate like and/or similar components (elements, structures, etc.) in different views. The drawings illustrate generally, by way of example, but not by way of limitation, various implementations discussed in the present disclosure. Reference labels shown in one drawing may not be repeated for the same, and/or similar elements in related views. Reference labels that are repeated in multiple drawings may not be specifically discussed with respect to each of those drawings, but are provided for context between related views. Also, not all like elements in the drawings may be specifically referenced with a reference label when multiple instances of that element are illustrated. DETAILED DESCRIPTION Packaged semiconductor device modules (semiconductor device assemblies) can include one or more semiconductor die. For example, a power semiconductor device module can include multiple semiconductor die implementing, respectively, power transistors, diodes, etc. As power requirements increase for such modules, such as for industrial or automotive applications, respective sizes of the semiconductor die can also increase while corresponding package size, form factor and/or footprint remain the same, e.g., for compatibility in existing systems configurations. Accordingly, in such implementations, spacing between semiconductor die decreases due to the increased die sizes and constant package size, including a constant size of a conductive member (die attach paddle, substrate, etc.) on which the semiconductor die are attached (coupled, mounted, etc.) in the device assembly. This decrease in die spacing can result in issues that affect quality and/or reliability of a corresponding semiconductor dev