US-20260130237-A1 - FILM PACKAGE, SEMICONDUCTOR MODULE AND DISPLAY DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD OF FILM PACKAGE

Abstract

A semiconductor module including a film package, and a printed circuit board connected to a first surface of the film package. The film package includes a base film, a semiconductor chip on the first surface of the base film, and a first conductive pattern on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first dummy pattern is spaced apart from the first circuit pattern and is between the first surface of the base film and the printed circuit board.

Inventors

• Seunghyun CHO
• Jae-Min Jung
• Minwoo CHO
• Jeong-kyu Ha

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260507

Application Date

20250530

Priority Date

20241107

Claims (20)

1. 1 . A semiconductor module, comprising: a film package; and a printed circuit board connected to a first surface of the film package, wherein the film package comprises: a base film; a semiconductor chip on the first surface of the base film; and a first conductive pattern on the first surface of the base film, wherein the first conductive pattern includes a first circuit pattern and a first dummy pattern, and wherein the first dummy pattern is spaced apart from the first circuit pattern and is between the first surface of the base film and the printed circuit board.
2. 2 . The semiconductor module of claim 1 , wherein the first circuit pattern includes a first outer terminal and a second outer terminal, wherein the first outer terminal is adjacent to a first end of the film package in a first direction, wherein the second outer terminal is adjacent to a second end of the film package, the second end of the film package being opposite to the first end of the film package in the first direction, and wherein the first outer terminal is disposed between the first dummy pattern and the first circuit pattern.
3. 3 . The semiconductor module of claim 2 , wherein the first outer terminal and the second outer terminal each include a plurality of individual conductive layers having an elongated shape, wherein a line width, or a pitch, or an interval of the plurality of the individual conductive layers included in the first outer terminal is greater than a line width, or a pitch, or an interval of the plurality of the individual conductive layers included in the second outer terminal; or wherein, in the first direction, a distance between the semiconductor chip and the second outer terminal is greater than a distance between the semiconductor chip and the first outer terminal.
4. 4 . The semiconductor module of claim 1 , wherein the first dummy pattern is electrically isolated from the first circuit pattern, and wherein the first dummy pattern forms a heat dissipation path to the printed circuit board.
5. 5 . The semiconductor module of claim 1 , wherein the first dummy pattern is directly connected to the printed circuit board or is connected to the printed circuit board via an adhesive layer.
6. 6 . The semiconductor module of claim 1 , wherein the first dummy pattern includes the same material as a material of the first circuit pattern and is on the same layer as the first circuit pattern.
7. 7 . The semiconductor module of claim 1 , further comprising: a circuit region where the first circuit pattern is disposed and a dummy region where the first dummy pattern is disposed; and a second dummy pattern on a second surface of the base film, the second surface of the base film being opposite to the first surface of the base film and vertically overlapping at least a portion of the dummy region.
8. 8 . The semiconductor module of claim 7 , further comprising: a through connector penetrating the base film and connected to the first dummy pattern and the second dummy pattern in the dummy region.
9. 9 . The semiconductor module of claim 7 , wherein the second dummy pattern vertically overlaps at least a portion of the circuit region.
10. 10 . A display device, comprising: a film package; a printed circuit board connected to the film package; and a display panel connected to the film package, wherein the film package includes a base film, a semiconductor chip on a first surface of the base film facing the printed circuit board or the display panel, and a first conductive pattern on the first surface of the base film, wherein the first conductive pattern includes a first circuit pattern and a first dummy pattern, and wherein the first dummy pattern is spaced apart from the first circuit pattern and is between the first surface of the base film and the printed circuit board.
11. 11 . A film package, comprising: a base film; a semiconductor chip on a first surface of the base film; and a first conductive pattern on the first surface of the base film, wherein the first conductive pattern comprises: a first circuit pattern in a circuit region, wherein the first circuit pattern includes a first outer terminal at a first end of the circuit region in a first direction and a second outer terminal at a second opposite end of the circuit region in the first direction, and a first dummy pattern in a dummy region outside the circuit region in the first direction and electrically isolated from the first circuit pattern and the semiconductor chip.
12. 12 . The film package of claim 11 , wherein the first outer terminal is disposed between the dummy region and the first end of the circuit region.
13. 13 . The film package of claim 12 , the first outer terminal and the second outer terminal each include a plurality of individual conductive layers having an elongated shape, wherein a line width, or a pitch, or an interval of the plurality of the individual conductive layers included in the first outer terminal is greater than a line width, or a pitch, or an interval of the plurality of the individual conductive layers included in the second outer terminal; or wherein, in the first direction, a distance between the semiconductor chip and the second outer terminal is greater than a distance between the semiconductor chip and the first outer terminal.
14. 14 . The film package of claim 11 , wherein the first dummy pattern includes the same material as a material of the first circuit pattern and is on the same layer as the first circuit pattern.
15. 15 . The film package of claim 11 , comprising: a second dummy pattern on a second surface of the base film, the second surface of the base film being opposite to the first surface of the base film and vertically overlapping at least a portion of the dummy region.
16. 16 . The film package of claim 15 , further comprising: a through connector penetrating the base film and connected to the first dummy pattern and the second dummy pattern in the dummy region.
17. 17 . The film package of claim 15 , wherein the second dummy pattern vertically overlaps at least a portion of the circuit region.
18. 18 . The film package of claim 11 , wherein the first dummy pattern is disposed to have an asymmetrical shape in the first direction.
19. 19 . The film package of claim 11 , wherein the first dummy pattern has a line shape or a bar shape extending in a second direction that intersects the first direction.
20. 20 . The film package of claim 11 , wherein a first width of the first dummy pattern in the first direction is greater than a width of the first outer terminal or a width of the second outer terminal in the first direction; or wherein the first width of the first dummy pattern in the first direction is greater than a distance between the semiconductor chip and the first outer terminal in the first direction.

Description

CROSS-REFERENCE TO RELATED APPLICATION This application claims priority under 35 U.S.C. § 119 to and the benefit of Korean Patent Application No. 10-2024-0157075 filed in the Korean Intellectual Property Office on Nov. 7, 2024, the entire contents of which are incorporated herein by reference. BACKGROUND (a) Field The present disclosure relates to a film package, a semiconductor module and a display device including the same, and a manufacturing method of a film package. (b) Description of the Related Art A semiconductor device may have a small size while performing various functions, and is thus widely used in various electronic industries. As advancements are made in the electronic industry, research is continuing on a packaging technology being capable of reducing a size of a semiconductor device while increasing performance of the semiconductor device. If a large amount of heat is generated in a semiconductor chip included in a film package, performance of the semiconductor chip may be deteriorated or the semiconductor chip may malfunction. Accordingly, research is continuing on a film package being capable of effectively dissipating the heat generated in the semiconductor chip. SUMMARY The present disclosure attempts to provide a film package capable of enhancing performance, a semiconductor module and a display device including the same, and a manufacturing method of a film package capable of enhancing performance and productivity. A semiconductor module according to an embodiment includes a film package, and a printed circuit board connected to a first surface of the film package. The film package includes a base film, a semiconductor chip on the first surface of the base film, and a first conductive pattern on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first dummy pattern is spaced apart from the first circuit pattern and is between the first surface of the base film and the printed circuit board. A display device according to an embodiment includes a film package, a printed circuit board connected to the film package, and a display panel connected to the film package. The film package includes a base film, a semiconductor chip on a first surface of the base film facing the printed circuit board or the display panel, and a first conductive pattern on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first dummy pattern is spaced apart from the first circuit pattern and is between the first surface of the base film and the printed circuit board. A film package according to an embodiment includes a base film, a semiconductor chip on a first surface of the base film, and a first conductive pattern on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first circuit pattern is in a circuit region. The first circuit pattern includes a first outer terminal at a first end of the circuit region in a first direction and a second outer terminal at a second opposite end of the circuit region in the first direction. The first dummy pattern is in a dummy region outside the circuit region in the first direction and is electrically isolated from the first circuit pattern and the semiconductor chip. A manufacturing method of a film package according to an embodiment includes forming a first photoresist pattern on a first surface of a base film, forming a first metal layer in an area other than area that includes the first photoresist pattern on the first surface of the base film, and removing the first photoresist pattern. The first photoresist pattern exposes areas of the first surface of the base film where a first circuit pattern and a first heat dissipation pattern are disposed. The first metal layer includes at least a portion of the first circuit pattern and the first heat dissipation pattern. A manufacturing method of a film package according to an embodiment includes forming a first photoresist pattern on a first surface of a base film, wherein the first photoresist pattern exposes areas of the first surface of the base film where a first circuit pattern and a first heat dissipation pattern are disposed; forming a first metal layer in an area other than an area that includes the first photoresist pattern on the first surface of the base film, wherein the first metal layer includes at least a portion of the first circuit pattern and the first heat dissipation pattern; and removing the first photoresist pattern. The method further includes forming a second heat dissipation pattern on a second surface of the base film opposite to the first surface of the base film. The method includes forming a second photoresist pattern on the second surface of the base film, wherein the second photoresist pattern exposes at least an area where a second heat dissipation pattern is dispose