US-20260130240-A1 - ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME

US20260130240A1US 20260130240 A1US20260130240 A1US 20260130240A1US-20260130240-A1

Abstract

A method for manufacturing an electronic device includes steps as follows. A substrate is provided. A first mask is provided on a first surface of the substrate. The first mask is patterned to form a first opening in the first mask, and the first opening exposes a corresponding portion of the substrate. A light source including a first energy is provided to the corresponding portion of the substrate to perform a first modification step, so as to form a first modified region in the substrate. Another light source including a second energy is provided to the corresponding portion of the substrate to perform a second modification step, so as to form a second modified region in the substrate. The second modified region at least partially overlaps the first modified region.

Inventors

Po-Yun HSU
Meng-Hsuan CHUANG

Assignees

Innolux Corporation

Dates

Publication Date: 20260507
Application Date: 20251006
Priority Date: 20250613

Claims (20)

1 . A method for manufacturing an electronic device, comprising: providing a substrate; providing a first mask on a first surface of the substrate; patterning the first mask to form a first opening in the first mask, wherein the first opening exposes a corresponding portion of the substrate; providing a light source comprising a first energy to the corresponding portion of the substrate to perform a first modification step, so as to form a first modified region in the substrate; and providing another light source comprising a second energy to the corresponding portion of the substrate to perform a second modification step, so as to form a second modified region in the substrate, wherein the second modified region at least partially overlaps the first modified region.
2 . The method for manufacturing the electronic device of claim 1 , wherein in a cross-sectional view of the substrate, the first modified region and the second modified region have an overlapping area, and a proportion of the overlapping area in the first modified region ranges from 5% to 20%.
3 . The method for manufacturing the electronic device of claim 1 , wherein a ratio of the first energy to the second energy ranges from 0.8 to 1.2.
4 . The method for manufacturing the electronic device of claim 1 , further comprising: removing the first modified region and the second modified region to form a through hole in the substrate, wherein the substrate further has a second surface opposite to the first surface, and the through hole has a first through-hole opening on the first surface and a second through-hole opening on the second surface; and removing the first mask.
5 . The method for manufacturing the electronic device of claim 4 , wherein the first modified region and the second modified region are removed through an etching process.
6 . The method for manufacturing the electronic device of claim 4 , wherein the first through-hole opening has a first diameter, the second through-hole opening has a second diameter, and when an absolute value of a difference between the second diameter and the first diameter is greater than 3 micrometers (μm), the method for manufacturing the electronic device further comprises: performing a rework step, wherein the substrate is subjected to a local etching process or a local laser process, so that the absolute value of the difference between the second diameter and the first diameter is equal to or less than 3 μm.
7 . The method for manufacturing the electronic device of claim 4 , further comprising: providing a conductive layer disposed in the through hole.
8 . The method for manufacturing the electronic device of claim 7 , before providing the conductive layer disposed in the through hole, further comprising: providing a buffer layer to cover at least one of the first surface, the second surface and a hole wall of the through hole of the substrate.
9 . The method for manufacturing the electronic device of claim 7 , further comprising: performing a planarization process to the conductive layer.
10 . The method for manufacturing the electronic device of claim 1 , further comprising: providing a second mask on a second surface of the substrate, wherein the second surface is opposite to the first surface; patterning the second mask to form a second opening in the second mask, wherein the second opening exposes the corresponding portion of the substrate; and providing a third energy to the corresponding portion of the substrate to perform a third modification step, so as to form a third modified region in the substrate.
11 . An electronic device, comprising: a substrate having a through hole, wherein in a cross-sectional view of the substrate, a hole wall of the through hole has a wavy profile, and the wavy profile extends along a normal direction of the substrate; and a conductive layer disposed in the through hole.
12 . The electronic device of claim 11 , wherein the wavy profile comprises a first convex portion, a concave portion and a second convex portion disposed sequentially along the normal direction, the first convex portion and the second convex portion protrudes toward the through hole in a radial direction of the through hole, and the concave portion concaves away from the through hole in the radial direction of the through hole.
13 . The electronic device of claim 11 , wherein the hole wall of the through hole has a surface roughness greater than or equal to 0.1 μm and less than or equal to 1.5 μm.
14 . The electronic device of claim 11 , wherein the substrate has a first surface and a second surface disposed opposite to the first surface, the through hole has a first through-hole opening on the first surface, the through hole has a second through-hole opening on the second surface, the first through-hole opening has a first diameter D 1 , the second through-hole opening has a second diameter D 2 , and a following condition is satisfied: |D 2 −D 1 |≤3 μm.
15 . The electronic device of claim 11 , wherein the substrate has a first surface and a second surface disposed opposite to the first surface, the through hole has a first through-hole opening on the first surface, the through hole has a second through-hole opening on the second surface, the electronic device further comprises a buffer layer, and the buffer layer covers at least one of the first surface, the second surface and a hole wall of the through hole of the substrate.
16 . The electronic device of claim 11 , further comprising: a circuit structure disposed on the substrate; and a first electronic unit disposed on the circuit structure and electrically connected with the circuit structure.
17 . The electronic device of claim 16 , further comprising: a carrier electrically connected with the circuit structure, wherein the circuit structure and the carrier are located on different sides of the substrate in the normal direction.
18 . The electronic device of claim 17 , further comprising: a bonding element disposed between the substrate and the carrier, wherein the circuit structure is electrically connected with the carrier through the conductive layer in the through hole and the bonding element.
19 . The electronic device of claim 17 , further comprising: a heat spreader disposed on the carrier, wherein the heat spreader surrounds the substrate, the circuit structure and the first electronic unit.
20 . The electronic device of claim 17 , further comprising: a second electronic unit disposed in the carrier.

Description

CROSS REFERENCE TO RELATED APPLICATION This application claims the benefit of U.S. Provisional Application No. 63/716,244, filed on Nov. 5, 2024. The content of the application is incorporated herein by reference. BACKGROUND OF THE DISCLOSURE 1. Field of the Disclosure The present disclosure relates to an electronic device and a method for manufacturing the same, and more particularly, to an electronic device including a substrate with a through hole and a method for manufacturing the same. 2. Description of the Prior Art In the field of integrated circuits, electronic devices may need to be configured with larger dimensions (e.g., larger areas) and more layers according to different applications and requirements. The aforementioned layers may include, for example, carriers used in the manufacturing process, substrate structures and redistribution layers as part of the final product. For example, using a large-area carrier in production is beneficial for increasing the output rate of packaging units or reducing manufacturing costs. However, when the dimension of the electronic device increases and the number of layers increases, the warpage degree of the electronic device also increases significantly. In order to reduce the warpage degree, a substrate with higher rigidity or insulating properties may be used. However, when forming through holes in the substrate with higher rigidity or insulating properties, it is easy to affect the yield of through holes due to incomplete modification, which in turn affects the yield of the electronic devices. SUMMARY OF THE DISCLOSURE According to an embodiment of the present disclosure, a method for manufacturing an electronic device includes steps as follows. A substrate is provided. A first mask is provided on a first surface of the substrate. The first mask is patterned to form a first opening in the first mask, and the first opening exposes a corresponding portion of the substrate. A light source including a first energy is provided to the corresponding portion of the substrate to perform a first modification step, so as to form a first modified region in the substrate. Another light source including a second energy is provided to the corresponding portion of the substrate to perform a second modification step, so as to form a second modified region in the substrate. The second modified region at least partially overlaps the first modified region. According to another embodiment of the present disclosure, an electronic device includes a substrate and a conductive layer. The substrate has a through hole. In a cross-sectional view of the substrate, a hole wall of the through hole has a wavy profile, and the wavy profile extends along a normal direction of the substrate. The conductive layer is disposed in the through hole. These and other objectives of the present disclosure will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the embodiment that is illustrated in the various figures and drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1, FIG. 2, FIG. 3, FIG. 4 and FIG. 5 are cross-sectional schematic diagrams showing steps of a method for manufacturing an electronic device according to an embodiment of the present disclosure. FIG. 6 is an enlarged schematic diagram of Part A1 in FIG. 4. FIG. 7 is a cross-sectional schematic diagram showing a step of a method for manufacturing an electronic device according to another embodiment of the present disclosure. FIG. 8 is a cross-sectional schematic diagram showing a step of a method for manufacturing an electronic device according to yet another embodiment of the present disclosure. FIG. 9 is a cross-sectional schematic diagram of an electronic device according to an embodiment of the present disclosure. FIG. 10 is a cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure. DETAILED DESCRIPTION The present disclosure may be understood by reference to the following detailed description, taken in conjunction with the drawings as described below. Wherever possible, the same or similar parts in the drawings and descriptions are represented by the same reference numeral. Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will understand, electronic equipment manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include/comprise” and “have” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited thereto . . . ”. In the present disclosure, the directional terms, such as “on/up/above”, “down/below”, “front”, “rear/back”, “left”, “right”, etc., are only directions referring to the drawings. Therefore, the directional terms are