US-20260130252-A1 - METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE INCLUDING UBM STRUCTURE

Abstract

A method of manufacturing a semiconductor package includes forming a first redistribution structure comprising a first redistribution layer and a first insulating layer, and first under bump metallurgy (UBM) structures spaced apart from the first redistribution layer, forming first conductive posts on the first redistribution structure, forming a first encapsulant on the first redistribution structure, forming a second redistribution structure, comprising a second redistribution layer and a second insulating layer, on the first encapsulant and the first conductive posts, forming first semiconductor chips on the second redistribution structure and forming second semiconductor chips on the first semiconductor chips, and forming first bumps on the first UBM structures. The first UBM structures overlap the first conductive posts in a first direction perpendicular with an upper surface of the first redistribution structure.

Inventors

• Kyounglim SUK
• Jihwang Kim
• Suchang LEE
• HYEONJEONG HWANG

Assignees

• SAMSUNG ELECTRONICS CO., LTD.

Dates

Publication Date

20260507

Application Date

20251203

Priority Date

20220930

Claims (20)

1. 1 . A method of manufacturing a semiconductor package, comprising: forming a first redistribution structure, comprising at least one first redistribution layer and at least one first insulating layer, on a carrier member, and first under bump metallurgy (UBM) structures spaced apart from the at least one first redistribution layer on a carrier member; forming first conductive posts on the first redistribution structure, the first conductive posts connected to the first UBM structures; forming a first encapsulant on the first redistribution structure to surround the first conductive posts; forming a second redistribution structure, comprising at least one second redistribution layer and at least one second insulating layer, on the first encapsulant and the first conductive posts; forming first semiconductor chips on the second redistribution structure and forming second semiconductor chips on each of the first semiconductor chips; and removing the carrier member and forming first bumps on the first UBM structures, wherein at least one of the first UBM structures overlaps at least one of the first conductive posts in a first direction perpendicular with an upper surface of the first redistribution structure.
2. 2 . The method as claimed in claim 1 , wherein the first UBM structures are connected to the first conductive posts, respectively.
3. 3 . The method as claimed in claim 1 , wherein the forming the second redistribution structure comprises forming second bumps on the second redistribution structure, and wherein each of the first semiconductor chips comprises through vias electrically connecting the second semiconductor chips and the second redistribution structure.
4. 4 . The method as claimed in claim 1 , wherein the forming the first conductive posts comprises forming impedance elements on the first redistribution structure to be spaced apart from the first conductive posts, and wherein the impedance elements overlap with the first semiconductor chips, respectively, in the first direction.
5. 5 . The method as claimed in claim 1 , wherein a maximum width of each of the first UBM structures is greater than a maximum width of each of the first conductive posts, and wherein a thickness of each of the first UBM structures is greater than a thickness of each of the at least one first redistribution layer.
6. 6 . The method as claimed in claim 1 , wherein each of the first UBM structures comprises: a first UBM layer surrounded by the at least one of the first insulating layer; and a second UBM layer between the at least one of the second insulating layer and the first UBM layer, the second UBM layer comprising a material different from a metal material of the first UBM layer.
7. 7 . The method as claimed in claim 6 , wherein each of the first UBM structures comprises a lower portion of the first UBM layer, an upper portion of the first UBM layer, and an UBM extended portion, and a thickness of the upper portion of the first UBM layer is greater than a thickness of the at least one of the first redistribution layer.
8. 8 . The method as claimed in claim 7 , wherein a width of the lower portion of the first UBM layer is smaller than a width of the upper portion of the first UBM layer, and greater than a maximum width of each of the first conductive posts.
9. 9 . The method as claimed in claim 6 , wherein the first UBM layer and a second UBM layer have a material different from each other.
10. 10 . The method as claimed in claim 1 , wherein the forming the first UBM structures further comprises forming second UBM structures not overlapping with the first conductive posts in the first direction.
11. 11 . The method as claimed in claim 1 , wherein the forming the first semiconductor chips further comprises forming a second encapsulant surrounding the first semiconductor chips and second conductive posts penetrating the second encapsulant.
12. 12 . The method as claimed in claim 11 , further comprising: forming a third redistribution structure on the second semiconductor chips, wherein the third redistribution structure is connected to the second conductive posts.
13. 13 . The method as claimed in claim 12 , further comprising: forming third posts and third UBM structures on the third redistribution structure, wherein the third UBM structures are connected to the third posts, respectively, in the first direction.
14. 14 . A method of manufacturing a semiconductor package, comprising: forming a first redistribution structure, comprising at least one first redistribution layer and at least one first insulating layer, on a carrier member, and under bump metallurgy (UBM) structures spaced apart from the at least one first redistribution layer on a carrier member; forming first conductive posts on the first redistribution structure, the first conductive posts connected to the at least one of the UBM structures; forming impedance elements on the first redistribution structure to be spaced apart from the first conductive posts; forming terminal structures on the impedance elements; forming a first encapsulant on the first redistribution structure to surround each of the first conductive posts, the impedance elements, and the terminal structures; forming a second redistribution structure, comprising at least one second redistribution layer and at least one second insulating layer, on the first encapsulant and the first conductive posts; forming first semiconductor chips on the second redistribution; and removing the carrier member and forming first bumps on the UBM structures, wherein at least one of the UBM structures overlaps with an impedance element among the impedance elements in a first direction perpendicular with un upper surface of the first redistribution structure.
15. 15 . The method as claimed in claim 14 , wherein the forming the first semiconductor chips comprises forming second semiconductor chips on each of the first semiconductor chips, wherein each of the first semiconductor chips comprises through vias electrically connecting the second semiconductor chips and the second redistribution structure.
16. 16 . The method as claimed in claim 14 , wherein a maximum width of each of the UBM structures is greater than a maximum width of each of the first conductive posts, and wherein a thickness of each of the UBM structures is greater than a thickness of each of the at least one first redistribution layer.
17. 17 . The method as claimed in claim 14 , wherein the impedance elements overlap with the first semiconductor chips, respectively, in the first direction, and wherein the UBM structures comprise first UBM structures overlapping with the first conductive posts in the first direction, and second UBM structures overlapping with the impedance elements in the first direction.
18. 18 . The method as claimed in claim 17 , wherein the first UBM structures are connected to the first conductive posts, respectively.
19. 19 . The method as claimed in claim 17 , wherein each of the first UBM structures is surrounded by the at least one of the first insulating layer and extends to at least portion of the each of the first conductive posts, and wherein each of the first UBM structures is surrounded by the at least one of the first insulating layer.
20. 20 . A method of manufacturing a semiconductor package, comprising: forming a first redistribution structure, comprising at least one first redistribution layer and at least one first insulating layer, on a carrier member and first under bump metallurgy (UBM) structures spaced apart from the at least one first redistribution layer on a carrier member; forming first conductive posts on the first redistribution structure, the first conductive posts connected to the at least one of the first UBM structures; forming a first encapsulant on the first redistribution structure to surround the first conductive posts; forming a second redistribution structure, comprising at least one second redistribution layer and at least one second insulating layer, on the first encapsulant and the first conductive posts; forming first semiconductor chips on the second redistribution structure and forming second semiconductor chips on each of the first semiconductor chips; and removing the carrier member and forming first bumps on the first UBM structures, wherein each of the first UBM structures comprises a lower portion of a first UBM layer, an upper portion of the first UBM layer, and an UBM extended portion, and wherein a thickness of the upper portion of the first UBM layer is greater than a thickness of the at least one of the first redistribution layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S) This is a Continuation of U.S. application Ser. No. 18/212,939 filed Jun. 22, 2023, which claims priority to Korean Patent Application No. 10-2022-0124807, filed on Sep. 30, 2022 in the Korean Intellectual Property Office, the disclosure of which is incorporated by reference herein in its entirety. BACKGROUND The disclosure relates to a semiconductor package. A semiconductor chip may be implemented as a semiconductor package such as a wafer level package (WLP) or a panel level package (PLP), and a semiconductor package may be used as an electronic component of a device. A semiconductor package may include a redistribution layer for electrically connecting a semiconductor chip to a device or a printed circuit board. The redistribution layer may have a structure in which redistribution layers, implemented to be finer than wirings of wiring layers of a general printed circuit board, are extended horizontally. The redistribution layer may be electrically connected to bumps to extend an electrical connection path vertically, and under bump metallurgy (UBM) may improve electrical connection efficiency between a redistribution layer and a bump. Since a system provided by a semiconductor chip has become increasingly complex and performance of a semiconductor chip has gradually increased, higher integration of a semiconductor package may be required, and a smaller size of the semiconductor package may be required for unit performance. However, as the integration density of the semiconductor package increases or the size for the same unit performance decreases, the degree of difficulty in securing reliability of the semiconductor package may increase. For example, a UBM closely connected to a bump may become a bottleneck in securing reliability of a semiconductor package. SUMMARY One or more example embodiments provide a semiconductor package having a structure which may increase integration density or which may reduce a size for unit performance, and may also increase reliability on an absolute basis or on a relative basis given a particular unit price or size). According to an aspect of an example embodiment, a method of manufacturing a semiconductor package comprises forming a first redistribution structure, comprising at least one first redistribution layer and at least one first insulating layer, on a carrier member, and first UBM structures spaced apart from the at least one first redistribution layer on a carrier member, forming first conductive posts on the first redistribution structure, the first conductive posts connected to the first UBM structures, forming a first encapsulant on the first redistribution structure to surround the first conductive posts, forming a second redistribution structure, comprising at least one second redistribution layer and at least one second insulating layer, on the first encapsulant and the first conductive posts, forming first semiconductor chips on the second redistribution structure and forming second semiconductor chips on each of the first semiconductor chips, and removing the carrier member and forming first bumps on the first UBM structures, wherein at least one of the first UBM structures overlaps at least one of the first conductive posts in a first direction perpendicular with an upper surface of the first redistribution structure. According to an aspect of an example embodiment, a method of manufacturing a semiconductor package comprises forming a first redistribution structure, comprising at least one first redistribution layer and at least one first insulating layer, on a carrier member, and UBM structures spaced apart from the at least one first redistribution layer on a carrier member, forming first conductive posts on the first redistribution structure, and the first conductive posts connected to the at least one of the UBM structures, forming impedance elements on the first redistribution structure to be spaced apart from the first conductive posts, forming terminal structures on the impedance elements, forming a first encapsulant on the first redistribution structure to surround each of the first conductive posts, the impedance elements, and the terminal structures, forming a second redistribution structure, comprising at least one second redistribution layer and at least one second insulating layer, on the first encapsulant and the first conductive posts, forming first semiconductor chips on the second redistribution, and removing the carrier member and forming first bumps on the UBM structures, wherein at least one of the UBM structures overlaps with an impedance element among the impedance elements in a first direction perpendicular with un upper surface of the first redistribution structure. According to an aspect of an example embodiment, a method of manufacturing a semiconductor package comprises forming a first redistribution structure, comprising at least one first redistribution layer and at least one first