US-20260130291-A1 - Semiconductor Device and Method of Forming Module-in-Package Structure Using Redistribution Layer

Abstract

A semiconductor device has a first semiconductor package, second semiconductor package, and RDL. The first semiconductor package is disposed over a first surface of the RDL and the second semiconductor package is disposed over a second surface of the RDL opposite the first surface of the RDL. A carrier is initially disposed over the second surface of the RDL and removed after disposing the first semiconductor package over the first surface of the RDL. The first semiconductor package has a substrate, plurality of conductive pillars formed over the substrate, electrical component disposed over the substrate, and encapsulant deposited around the conductive pillars and electrical component. A shielding frame can be disposed around the electrical component. An antenna can be disposed over the first semiconductor package. A portion of the encapsulant is removed to planarize a surface of the encapsulant and expose the conductive pillars.

Inventors

• GunHyuck Lee
• YuJeong Jang
• Gayeun Kim
• YoungUk Noh

Assignees

• STATS ChipPAC Pte. Ltd.

Dates

Publication Date

20260507

Application Date

20260106

Claims (20)

1. 1 . A semiconductor device, comprising: a first formed semiconductor package or component; a second formed semiconductor package or component; and a redistribution layer (RDL), wherein the first formed semiconductor package or component is disposed over a first surface of the RDL, and the second formed semiconductor package or component is disposed over a second surface of the RDL opposite the first surface of the RDL.
2. 2 . The semiconductor device of claim 1 , further including an antenna disposed over the first formed semiconductor package or component.
3. 3 . The semiconductor device of claim 1 , wherein the first formed semiconductor package or component includes: a first substrate; a plurality of first conductive pillars formed over the first substrate; and a first electric component disposed over the first substrate between the first conductive pillars.
4. 4 . The semiconductor device of claim 3 , wherein the second formed semiconductor package or component includes: a second substrate; a plurality of second conductive pillars formed over the second substrate; and a second electric component disposed over the second substrate between the second conductive pillars.
5. 5 . The semiconductor device of claim 3 , further including a shielding frame disposed around the first electrical component.
6. 6 . The semiconductor device of claim 3 , further including an encapsulant deposited over the first substrate and first electrical component and first conductive pillars, wherein a surface of the encapsulant is planarized to expose the first conductive pillars.
7. 7 . A semiconductor device, comprising: a first formed semiconductor package or component; a second formed semiconductor package or component; and a redistribution layer (RDL) disposed between the first formed semiconductor package or component and the second formed semiconductor package or component.
8. 8 . The semiconductor device of claim 7 , further including an antenna disposed over the first formed semiconductor package or component.
9. 9 . The semiconductor device of claim 7 , wherein the first formed semiconductor package or component includes: a first substrate; a plurality of first conductive pillars formed over the first substrate; and a first electric component disposed over the first substrate between the first conductive pillars.
10. 10 . The semiconductor device of claim 9 , wherein the second formed semiconductor package or component includes: a second substrate; a plurality of second conductive pillars formed over the second substrate; and a second electric component disposed over the second substrate between the second conductive pillars.
11. 11 . The semiconductor device of claim 9 , further including a shielding frame disposed around the first electrical component.
12. 12 . The semiconductor device of claim 9 , further including an encapsulant deposited over the first substrate and first electrical component and first conductive pillars, wherein a surface of the encapsulant is planarized to expose the first conductive pillars.
13. 13 . The semiconductor device of claim 9 , wherein a non-active surface of the first electric component contacts a conductive layer of the RDL.
14. 14 . A method of making a semiconductor device, comprising: providing a redistribution layer (RDL); disposing a first formed semiconductor package or component over a first surface of the RDL; and disposing a second formed semiconductor package or component over a second surface of the RDL opposite the first surface of the RDL.
15. 15 . The method of claim 14 , further including disposing an antenna over the first formed semiconductor package or component.
16. 16 . The method of claim 14 , wherein the first formed semiconductor package or component includes: providing a first substrate; forming a plurality of first conductive pillars over the first substrate; and disposing a first electric component over the first substrate between the first conductive pillars.
17. 17 . The method of claim 16 , wherein the second formed semiconductor package or component includes: providing a second substrate; forming a plurality of second conductive pillars over the second substrate; and disposing a second electric component over the second substrate between the second conductive pillars.
18. 18 . The method of claim 16 , further including disposing a shielding frame around the first electrical component.
19. 19 . The method of claim 16 , further including: depositing an encapsulant over the first substrate and first electrical component and first conductive pillars; and planarizing a surface of the encapsulant to expose the first conductive pillars.
20. 20 . A method of making a semiconductor device, comprising: providing a first formed semiconductor package or component; providing a second formed semiconductor package or component; and disposing a redistribution layer (RDL) between the first formed semiconductor package or component and the second formed semiconductor package or component.

Description

CLAIM OF DOMESTIC PRIORITY The present application is a continuation of U.S. patent application Ser. No. 17/820,502, filed Aug. 17, 2022, which application is incorporated herein by reference. FIELD OF THE INVENTION The present invention relates in general to semiconductor devices and, more particularly, to a semiconductor device and method of forming a module-in-package structure using a redistribution layer. BACKGROUND OF THE INVENTION Semiconductor devices are commonly found in modern electrical products. Semiconductor devices perform a wide range of functions, such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electrical devices, photo-electric, and creating visual images for television displays. Semiconductor devices are found in the fields of communications, power conversion, networks, computers, entertainment, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment. One or more semiconductor die can be integrated into a semiconductor package for higher density in a small space and extended electrical functionality. The trend is toward higher performance, higher integration, and miniaturization for applications, such as 5G communications. Yet, the high number of packages and functions that must be assembled for the application results in a large size module. Thermal management also becomes an issue with designing large modules. The lead length between packages within the module increases propagation delay and transmission loss. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1a-1c illustrate a semiconductor wafer with a plurality of semiconductor die separated by a saw street; FIGS. 2a-2f illustrate a process of forming a first semiconductor package with electrical components and conductive pillars disposed over a first interconnect substrate; FIGS. 3a-3c illustrate a process of forming a second semiconductor package with electrical components and conductive pillars disposed over a second interconnect substrate; FIGS. 4a-4b illustrate a process of forming an RDL disposed over a temporary carrier; FIGS. 5a-5d illustrate a process of disposing the first semiconductor package and second semiconductor package on opposite sides of the RDL; FIGS. 6a-6j illustrate various ways of attaching the first semiconductor package and second semiconductor package to opposite sides of the RDL; FIGS. 7a-7d illustrate another process of disposing the first semiconductor package and second semiconductor package on opposite sides of the RDL; FIGS. 8a-8e illustrate another process of disposing the first semiconductor package and second semiconductor package on opposite sides of the RDL; FIGS. 9a-9c illustrate the MiP with a shielding frame around the electric components; FIG. 10 illustrates the MiP with antenna disposed over the packages; FIG. 11 illustrates the MiP with an alternate antenna disposed over the packages; FIG. 12 illustrates the MiP with conductive vias formed through the electrical components; and FIG. 13 illustrates a printed circuit board (PCB) with different types of packages disposed on a surface of the PCB. DETAILED DESCRIPTION OF THE DRAWINGS The present invention is described in one or more embodiments in the following description with reference to the figures, in which like numerals represent the same or similar elements. While the invention is described in terms of the best mode for achieving the invention's objectives, it will be appreciated by those skilled in the art that it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims and their equivalents as supported by the following disclosure and drawings. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly, can refer to both a single semiconductor device and multiple semiconductor devices. Semiconductor devices are generally manufactured using two complex manufacturing processes: front-end manufacturing and back-end manufacturing. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die on the wafer contains active and passive electrical components, which are electrically connected to form functional electrical circuits. Active electrical components, such as transistors and diodes, have the ability to control the flow of electrical current. Passive electrical components, such as capacitors, inductors, and resistors, create a relationship between voltage and current necessary to perform electrical circuit functions. Back-end manufacturing refers to cutting or singulating the finished wafer into the individual semiconductor die and packaging the semiconductor die for structural support, electrical interconnect, and environmental isolation. To singulate the semiconduc