US-20260130298-A1 - SUBSTRATE BONDING WITH LOCAL BONDING REGION SHAPE CONTROL

Abstract

A method of bonding a smaller substrate, such as a die, to a larger substrate, such as a wafer. The method includes forming a bulge at a front side of the larger substrate by releasably securing a backside of the larger substrate to a rigid chuck, bonding the smaller substrate to the bulge at the front side of the larger substrate, and allowing the bulge to flatten by releasing the larger substrate from the rigid chuck. A variable thickness material on the backside of the larger substrate induces the bulge at the front side of the larger substrate. The method may also include forming the variable thickness material on the backside of the larger substrate. Multiple bulges may be induced at the front side of the larger substrate. Multiple smaller substrates may be bonded to a single bulge.

Inventors

• Christopher Michael Netzband
• Michael Murphy
• Ilseok Son

Assignees

• TOKYO ELECTRON LIMITED

Dates

Publication Date

20260507

Application Date

20241107

Claims (20)

1. 1 . A method of bonding a smaller substrate to a larger substrate, the method comprising: forming a bulge at a front side of the larger substrate by releasably securing a backside of the larger substrate to a rigid chuck, a variable thickness material on the backside of the larger substrate inducing the bulge at the front side of the larger substrate; bonding the smaller substrate to the bulge at the front side of the larger substrate; and allowing the bulge to flatten by releasing the larger substrate from the rigid chuck.
2. 2 . The method of claim 1 , further comprising: forming the variable thickness material on the backside of the larger substrate, the variable thickness material comprising at least one locally thicker region substantially vertically aligned with the bulge.
3. 3 . The method of claim 2 , further comprising: forming the at least one locally thicker region by patterning a photoresist layer on the backside of the larger substrate using a photolithographic process.
4. 4 . The method of claim 3 , wherein forming the at least one locally thicker region further comprises increasing the thickness the at least one locally thicker region by patterning one or more additional photoresist layers on the backside of the larger substrate using the photolithographic process.
5. 5 . The method of claim 3 , wherein the photolithographic process comprises a variable exposure process.
6. 6 . The method of claim 1 , wherein the larger substrate is releasably secured to the rigid chuck using a vacuum.
7. 7 . The method of claim 1 , wherein the larger substrate is a wafer and the smaller substrate is a die.
8. 8 . The method of claim 1 , further comprising: removing the variable thickness material from the backside of the larger substrate after the larger substrate has been released from the rigid chuck.
9. 9 . The method of claim 1 , further comprising: bonding one or more additional smaller substrates to one or more additional bulges on the front side of the larger substrate, the one or more additional bulges being induced by one or more additional locally thicker regions of the variable thickness material.
10. 10 . The method of claim 9 , wherein the variable thickness material comprises differently sized locally thicker regions.
11. 11 . The method of claim 9 , wherein the variable thickness material comprises differently shaped locally thicker regions.
12. 12 . A method of bonding a die to a wafer, the method comprising: forming a variable thickness material on a backside of the wafer, the variable thickness material comprising at least one locally thicker region; forming a bulge at a front side of the wafer by releasably securing the backside of the wafer to a rigid chuck, the at least one locally thicker region inducing the bulge at the front side of the wafer; bonding the die to the bulge at the front side of the wafer; and allowing the bulge to flatten by releasing the wafer from the rigid chuck.
13. 13 . The method of claim 12 , forming the at least one locally thicker region by patterning a photoresist layer on the backside of the wafer using a photolithographic process.
14. 14 . The method of claim 13 , wherein forming the at least one locally thicker region further comprises increasing the thickness the at least one locally thicker region by patterning one or more additional photoresist layers on the backside of the wafer using the photolithographic process.
15. 15 . The method of claim 14 , wherein the photolithographic process comprises a variable exposure process.
16. 16 . The method of claim 12 , wherein the wafer is releasably secured to the rigid chuck using a vacuum.
17. 17 . A method of bonding a plurality of dies to a wafer, the method comprising: forming a plurality of bulges on a front side of the wafer by releasably securing a backside of the wafer to a rigid chuck, a variable thickness material on the backside of the wafer inducing the plurality of bulges on the front side of the wafer; bonding the plurality of dies to respective ones of the plurality of bulges on the front side of the wafer; and allowing the plurality of bulges to flatten by releasing the wafer from the rigid chuck.
18. 18 . The method of claim 17 , wherein the variable thickness material comprises differently sized locally thicker regions.
19. 19 . The method of claim 17 , wherein the variable thickness material comprises differently shaped locally thicker regions.
20. 20 . The method of claim 17 , wherein the wafer is releasably secured to the rigid chuck using a vacuum.

Description

TECHNICAL FIELD The present invention relates generally to the field of semiconductor manufacturing, and, more specifically, to substrate bonding processes. BACKGROUND In the semiconductor industry, technological advancement has historically been achieved by scaling down generational technology nodes to ever smaller features and critical dimensions. In recent years, due to a variety of factors including increasing cost and complexity of nodes in nanometer ranges, heterogenous integration of different semiconductor parts into advanced packages has become an increasingly important economic factor in the semiconductor industry. In particular, a need for ever greater numbers of transistors in applications that push performance limits, such as high-performance computing, artificial intelligence (AI)/machine learning (ML), machine vision, and autonomous vehicles and robots, among others, has made such advanced heterogenous packages more economically important. The economic advantages of heterogenous integration can include the ability to combine or mix semiconductor parts from different technology nodes into a single package. In this manner, the complexity or scope of portions of the single heterogenous package that utilize the latest but most resource-intensive technology nodes (e.g., 7 nm or 3 nm nodes) can be reduced or minimized, which can lead to overall economic optimization. Two or more substrates, such as dies and/or wafers (e.g., already including structures, such as devices, interconnects, and bonding pads), may be bonded together (e.g., stacked) to mix different technology nodes in a single final product for economic benefits. For example, the semiconductor industry has embraced three-dimensional (3D) packaging to enable hybrid devices. 3D integrated circuits (ICs) are often fabricated using substrate bonding processes that produce multiple 3D ICs or chips in a single operation, which can then be diced apart from the bonded wafer structure. Substrate bonding processes may be direct (i.e., there is no intervening separate material between the bonded surfaces of the substrates) and may take place between substrate of the same or different sizes. Some examples of substrate bonding processes involving dies and wafers (common substrates in the semiconductor industry) include wafer-to-wafer (W2W), die-to-wafer (D2W), or die-to-die (D2D), which involve bonding an entire wafer to another entire wafer, bonding at least one die to an entire wafer, or bonding at least one die to another die, respectively. During substrate bonding processes, precise alignment and bonding of multiple layers is crucial to ensure the functionality and performance of the final device(s). Bonding misalignment refers to the misplacement or mis-registration of patterns and features between different layers during a substrate bonding process. This misalignment can result in various issues such as reduced device yield, degraded electrical performance, and increased fabrication costs. There are components of bonding misalignment, some of which include scaling, translation (i.e., XY positioning error), and rotation. Scaling refers to differences in size and shape between the bonded substrates and may be caused by stretching of one substrate related to the other substrate during the bonding process. Scaling can account for a large proportion of the total distortion budget (i.e., the acceptable amount of distortion to ensure that features on the substrates are sufficiently aligned). Therefore, improved bonding processes that reduce substrate scaling during the bonding process may be desirable. SUMMARY In accordance with an embodiment of the invention, a method of bonding a smaller substrate to a larger substrate includes forming a bulge at a front side of the larger substrate by releasably securing a backside of the larger substrate to a rigid chuck, bonding the smaller substrate to the bulge at the front side of the larger substrate, and allowing the bulge to flatten by releasing the larger substrate from the rigid chuck. A variable thickness material on the backside of the larger substrate induces the bulge at the front side of the larger substrate. In accordance with another embodiment of the invention, a method of bonding a die to a wafer includes forming a variable thickness material on a backside of the wafer, forming a bulge at a front side of the wafer by releasably securing the backside of the wafer to a rigid chuck, bonding the die to the bulge at the front side of the wafer, and allowing the bulge to flatten by releasing the wafer from the rigid chuck. The variable thickness material includes at least one locally thicker region. The at least one locally thicker region induces the bulge at the front side of the wafer. In accordance with still another embodiment of the invention, a method of bonding a plurality of dies to a wafer includes forming a plurality of bulges on a front side of the wafer by releasably securing a backside of t