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WO-2026091511-A1 - BUCK-BOOST CONVERTER AND MODE SWITCHING METHOD AND CIRCUIT THEREFOR

WO2026091511A1WO 2026091511 A1WO2026091511 A1WO 2026091511A1WO-2026091511-A1

Abstract

Disclosed in the present invention are a buck-boost converter and a mode switching method and circuit therefor. The mode switching method comprises: on the basis of a boost-buck mode signal and a third drive signal of a third switching transistor, selecting a drive signal from the third drive signal, and a first drive signal of a first switching transistor, filtering the selected drive signal or a voltage-divided signal of the selected drive signal and then comparing a filtered signal with a first reference voltage, and obtaining a closed-loop buck mode signal on the basis of a comparison result; comparing an output voltage of a buck-boost converter with a second reference voltage, and obtaining an open-loop buck mode signal on the basis of a comparison result; and when both the closed-loop buck mode signal and the open-loop buck mode signal are effective, outputting an effective buck mode signal, so as to switch an operating mode of the buck-boost converter to a buck mode in the next switching cycle. Therefore, the accuracy of determining an operating mode of the buck-boost converter is improved, and smooth switching between operating modes of the buck-boost converter is realized.

Inventors

  • YI, XINMIN
  • LIU, YUJIA
  • LIU, XIAOLIN

Assignees

  • 圣邦微电子(北京)股份有限公司

Dates

Publication Date
20260507
Application Date
20250530
Priority Date
20241030

Claims (10)

  1. A mode switching method for a buck-boost converter, the buck-boost converter including an inductor, a first switch, a second switch, a third switch, and a fourth switch, wherein the first switch, the inductor, and the fourth switch are sequentially connected between an input terminal and an output terminal, one end of the second switch is connected to the node between the first switch and the inductor, and one end of the third switch is connected to the node between the inductor and the fourth switch, the buck-boost converter operating modes include buck mode, boost mode, and boost-buck mode, wherein the mode switching method includes: Based on the boost-buck mode signal and the third drive signal of the third switch, a drive signal is selected from the third drive signal and the first drive signal of the first switch. The selected drive signal or the voltage divider signal of the selected drive signal is filtered and compared with the first reference voltage. The closed-loop buck mode signal is obtained based on the comparison result. The output voltage of the buck-boost converter is compared with a second reference voltage, and the open-loop buck mode signal is obtained based on the comparison result; and When both the closed-loop buck mode signal and the open-loop buck mode signal are valid, a valid buck mode signal is output to switch the operating mode of the buck-boost converter to the buck mode in the next switching cycle.
  2. The mode switching method according to claim 1 further includes: Based on the boost-buck mode signal and the second drive signal of the second switch, a drive signal is selected from the second drive signal and the fourth drive signal of the fourth switch. The selected drive signal or the voltage divider signal of the selected drive signal is filtered and compared with the third reference voltage. The closed-loop boost mode signal is obtained based on the comparison result. The output voltage of the buck-boost converter is compared with a fourth reference voltage, and the open-loop boost mode signal is obtained based on the comparison result; and When the closed-loop boost mode signal and/or the open-loop boost mode signal are valid, a valid boost mode signal is output to switch the operating mode of the buck-boost converter to the boost mode in the next switching cycle. When both the buck mode signal and the boost mode signal are invalid, a valid boost-buck mode signal is output to switch the operating mode of the buck-boost converter to the boost-buck mode in the next switching cycle.
  3. According to the mode switching method of claim 1, the step of selecting a driving signal from the third driving signal and the first driving signal of the first switching transistor based on the boost-buck mode signal and the third driving signal of the third switching transistor, filtering the selected driving signal or the voltage divider signal of the selected driving signal and comparing it with the first reference voltage, and obtaining the closed-loop buck mode signal based on the comparison result includes: The boost-buck mode signal and the third drive signal are ANDed together, and the third drive signal or the voltage divider of the first drive signal is provided to the first node according to the result of the operation. The voltage at the first node is filtered to obtain a step-down filtered voltage; and The buck filter voltage is compared with the first reference voltage, and the closed-loop buck mode signal is obtained based on the comparison result. Wherein, the first reference voltage is equal to the product of the first threshold and the first voltage, the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter, the first threshold is related to the maximum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in buck mode, and the first voltage is related to the amplitude of the first to fourth drive signals.
  4. According to the mode switching method of claim 2, the step of selecting a driving signal from the second driving signal and the fourth driving signal of the fourth switching transistor based on the boost-buck mode signal and the second driving signal of the second switching transistor, filtering the selected driving signal or the voltage divider signal of the selected driving signal and comparing it with the third reference voltage, and obtaining the closed-loop boost mode signal based on the comparison result includes: The boost-buck mode signal and the second drive signal are ANDed together, and the voltage divider signal of the second drive signal or the fourth drive signal is provided to the second node according to the result of the operation. The voltage at the second node is filtered to obtain a boost filter voltage; and The boost filter voltage is compared with the third reference voltage, and the closed-loop boost mode signal is obtained based on the comparison result. Wherein, the third reference voltage is equal to the product of the second threshold and the first voltage, the fourth reference voltage is equal to the product of the second threshold and the input voltage, the second threshold is related to the minimum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.
  5. A mode switching circuit for a buck-boost converter, the buck-boost converter including an inductor, a first switch, a second switch, a third switch, and a fourth switch, wherein the first switch, the inductor, and the fourth switch are sequentially connected between an input terminal and an output terminal, one end of the second switch is connected to the node between the first switch and the inductor, and one end of the third switch is connected to the node between the inductor and the fourth switch, the buck-boost converter has operating modes including buck mode, boost mode, and boost-buck mode, and the mode switching circuit includes: The closed-loop buck mode determination module is used to select a driving signal from the third driving signal and the first driving signal of the first switching transistor based on the boost-buck mode signal and the third driving signal of the third switching transistor, filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the first reference voltage, and obtain the closed-loop buck mode signal based on the comparison result. An open-loop buck converter determination module is used to compare the output voltage of the buck-boost converter with a second reference voltage and obtain an open-loop buck mode signal based on the comparison result; and The open-loop/closed-loop judgment module is used to output a valid buck mode signal when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, so as to switch the operating mode of the buck-boost converter to the buck mode in the next switching cycle.
  6. The mode switching circuit according to claim 5 further includes: The closed-loop boost mode determination module is used to select a driving signal from the second driving signal and the fourth driving signal of the fourth switching transistor based on the boost-buck mode signal and the second driving signal of the second switching transistor, filter the selected driving signal or the voltage divider signal of the selected driving signal and compare it with the third reference voltage, and obtain the closed-loop boost mode signal based on the comparison result. An open-loop boost mode determination module is used to compare the output voltage of the buck-boost converter with a fourth reference voltage and obtain an open-loop boost mode signal based on the comparison result; and The open-loop and closed-loop judgment module is also used to output a valid boost mode signal when the closed-loop boost mode signal and/or the open-loop boost mode signal are valid, so as to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle. The open-loop and closed-loop judgment module is also used to output a valid boost-buck mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the working mode of the buck-buck converter to boost-buck mode in the next switching cycle.
  7. According to claim 6, the mode switching circuit, wherein the closed-loop buck judgment module includes: The first resistor and the second resistor are connected sequentially between the first drive signal and the ground terminal; The third resistor and the first transmission gate are connected sequentially between the third driving signal and the first node; The second transmission gate is connected between the common node of the first resistor and the second resistor and the first node; The first comparator has its negative input connected to the first node, its positive input receiving the first reference voltage, and its output providing the closed-loop buck mode signal. The first NAND gate receives the boost-buck mode signal at its first input, receives the third drive signal at its second input, and its output is connected to the control terminal of the second transmission gate. The first NOT gate receives the output of the first NAND gate at its input terminal, and its output terminal is connected to the control terminal of the first transmission gate. The open-loop buck judgment module includes: The third comparator receives the output voltage of the buck-boost converter at its negative input terminal, receives the second reference voltage at its positive input terminal, and provides the open-loop buck mode signal at its output terminal. The open-loop/closed-loop determination module includes: The third NAND gate receives the open-loop buck mode signal at its first input and the closed-loop buck mode signal at its second input. The third NOT gate has its input connected to the output of the third NAND gate, and its output provides the buck mode signal.
  8. According to claim 7, the mode switching circuit, wherein the closed-loop boost judgment module includes: The fourth and fifth resistors are connected sequentially between the fourth drive signal and the ground terminal; The sixth resistor and the third transmission gate are connected sequentially between the second drive signal and the second node; The fourth transmission gate is connected between the common node of the fourth and fifth resistors and the second node; The second comparator has its negative input connected to the second node, its positive input receiving the third reference voltage, and its output providing the closed-loop boost mode signal. The second NAND gate has a first input terminal that receives the boost-buck mode signal, a second input terminal that receives the second drive signal, and an output terminal that is connected to the control terminal of the fourth transmission gate. The second NOT gate receives the output of the second NAND gate at its input terminal, and its output terminal is connected to the control terminal of the third transmission gate. The open-loop boost judgment module includes: The fourth comparator receives the output voltage of the buck-boost converter at its positive input terminal, receives the fourth reference voltage at its negative input terminal, and provides the open-loop boost mode signal at its output terminal. The open-loop/closed-loop determination module also includes: The first NOR gate receives the open-loop boost mode signal at its first input and the closed-loop boost mode signal at its second input. The fourth NOT gate has its input connected to the output of the first NOR gate, and its output provides the boost mode signal. The second NOR gate has its first input receiving the output of the third NOT gate, its second input receiving the output of the fourth NOT gate, and its output providing the boost-buck mode signal.
  9. According to the mode switching circuit of claim 8, the first to fourth comparators are hysteresis comparators, and the resistance values of the first resistor, the second resistor, the fourth resistor and the fifth resistor are equal. The first reference voltage is equal to the product of the first threshold and the first voltage; the third reference voltage is equal to the product of the second threshold and the first voltage; the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter; and the fourth reference voltage is equal to the product of the second threshold and the input voltage. The first threshold is related to the maximum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in buck mode; the second threshold is related to the minimum conversion ratio between the output voltage and the input voltage when the buck-boost converter is in boost mode; and the first voltage is related to the amplitude of the first to fourth drive signals.
  10. A buck-boost converter, comprising: The first switch and the second switch are connected sequentially between the input voltage and the ground terminal, and their common node is the first switch node. The control terminals of the first switch and the second switch receive the first drive signal and the second drive signal, respectively. An inductor is connected between the first switching node and the second switching node; The third switch is connected between the second switch node and the ground terminal, and the control terminal of the third switch receives the third drive signal; The fourth switch is connected between the second switch node and the output voltage, and the control terminal of the fourth switch receives the fourth drive signal. The mode switching circuit as described in any one of claims 5-9; and The logic control circuit is used to control the buck-boost converter to operate in the corresponding operating mode according to the boost mode signal, buck mode signal, and boost-buck mode signal.

Description

Buck converter and its mode switching method and circuit Cross-reference of related applications This application claims priority to Chinese Patent Application No. 202411536941.7, filed on October 30, 2024, entitled "Boost-Buck Converter and Mode Switching Method and Circuit Thereof", the entire contents of which are incorporated herein by reference. Technical Field This invention relates to the field of integrated circuit technology, and in particular to a buck-boost converter and its mode switching method and circuit. Background Technology The four-switch buck-boost converter has three operating modes: buck mode, boost mode, and buck-boost mode. It adapts to different voltage conversion requirements by switching between the three operating modes. Existing technologies for determining the operating mode of four-switch buck-boost converters typically employ open-loop determination. This method involves comparing the converter's output voltage with a threshold voltage using a hysteresis condition, and then determining the operating mode based on the comparison result. Here, the threshold voltage is the product of the input voltage and a fixed duty cycle. Because this method does not dynamically adjust the duty cycle according to the actual load current, it often fails to accurately determine the true operating state of the four-switch buck-boost converter when faced with large load currents, thus increasing the risk of misjudgment. Therefore, a new four-switch buck-boost converter and its mode switching method and circuit are needed to solve the above problems. Summary of the Invention In view of the above problems, the purpose of this invention is to provide a buck-boost converter and its mode switching method and circuit, so as to realize smooth switching between the working modes of the buck-boost converter. According to one aspect of the present invention, a mode switching method for a buck-boost converter is provided. The buck-boost converter includes an inductor, a first switch, a second switch, a third switch, and a fourth switch. The first switch, the inductor, and the fourth switch are sequentially connected between an input terminal and an output terminal. One end of the second switch is connected to a node between the first switch and the inductor. One end of the third switch is connected to a node between the inductor and the fourth switch. The buck-boost converter operates in buck mode, boost mode, and boost-buck mode. The mode switching method includes adjusting the input and output modes based on a boost-buck mode signal and the input and output modes. The third drive signal of the third switch selects a drive signal from the third drive signal and the first drive signal of the first switch. The selected drive signal or the voltage divider signal of the selected drive signal is filtered and compared with the first reference voltage. A closed-loop buck mode signal is obtained based on the comparison result. The output voltage of the buck-boost converter is compared with the second reference voltage. An open-loop buck mode signal is obtained based on the comparison result. When both the closed-loop buck mode signal and the open-loop buck mode signal are valid, a valid buck mode signal is output to switch the operating mode of the buck-boost converter to the buck mode in the next switching cycle. Optionally, the mode switching method further includes selecting a driving signal from the second driving signal and the fourth driving signal of the fourth switching transistor based on the boost-buck mode signal and the second driving signal of the second switching transistor; filtering the selected driving signal or the voltage divider signal of the selected driving signal and comparing it with a third reference voltage; obtaining a closed-loop boost mode signal based on the comparison result; comparing the output voltage of the buck-boost converter with the fourth reference voltage; obtaining an open-loop boost mode signal based on the comparison result; and outputting a valid boost mode signal when the closed-loop boost mode signal and/or the open-loop boost mode signal are valid, so as to switch the operating mode of the buck-boost converter to the boost mode in the next switching cycle; the mode switching method further includes outputting a valid boost-buck mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the operating mode of the buck-boost converter to the boost-buck mode in the next switching cycle. Optionally, the step of selecting a driving signal from the third driving signal and the first driving signal of the first switching transistor based on the boost-buck mode signal and the third driving signal of the third switching transistor, filtering the selected driving signal or the voltage divider signal of the selected driving signal and comparing it with the first reference voltage, and obtaining the closed-loop buck mode signal based on the