WO-2026092084-A1 - ARRAY SUBSTRATE AND DRIVING METHOD THEREFOR, AND ELECTRONIC PAPER DISPLAY PANEL

Abstract

An array substrate (100) and a driving method therefor, and an electronic paper display panel (10), wherein each pixel electrode (261) corresponds to each pixel region (330) in a one-to-one manner; each common electrode sheet (400) corresponds to each pixel region (330) in a one-to-one manner, one common electrode sheet (400) comprises a plurality of sub-common electrodes (410), and within a same pixel region (330), an orthogonal projection of the pixel electrode (261) covers orthogonal projections of the plurality of sub-common electrodes (410); the array substrate (100) further comprises a control module (600), and the control module (600) is capable of selecting a number of sub-common electrodes (410) to be connected in a same pixel region (330) according to a temperature on the array substrate (100).

Inventors

• CAO, Junhong
• YE, Lidan

Assignees

• 惠科股份有限公司

Dates

Publication Date

20260507

Application Date

20251011

Priority Date

20241029

Claims (20)

1. An array substrate is used in an electronic paper display panel. The array substrate includes a substrate, data lines, scan lines, and pixel electrodes. The data lines and scan lines are both disposed on the substrate, and the data lines and scan lines intersect to define multiple pixel regions. The pixel electrodes are disposed on the substrate, and each pixel electrode corresponds to each pixel region. The array substrate further includes a common electrode sheet, which is disposed on the substrate. Each common electrode sheet corresponds one-to-one with each pixel region. One common electrode sheet includes multiple sub-common electrodes, and the orthogonal projection of the pixel electrode in the same pixel region covers the orthogonal projection of multiple sub-common electrodes. The array substrate also includes a control module, which can select the number of sub-common electrodes connected in the same pixel region according to the temperature on the array substrate.
2. According to claim 1, the array substrate includes three sub-common electrodes, which are respectively defined as a first sub-common electrode, a second sub-common electrode, and a third sub-common electrode, wherein the area of the first sub-common electrode is larger than the area of the second sub-common electrode, and the area of the second sub-common electrode is larger than the area of the third sub-common electrode.
3. According to claim 2, the array substrate further includes a first common electrode trace, a second common electrode trace, and a third common electrode trace, wherein the first common electrode trace, the second common electrode trace, and the third common electrode trace are all disposed on the substrate; The first common electrode trace is connected to the first sub-common electrode, the second common electrode trace is connected to the second sub-common electrode, and the third common electrode trace is connected to the third common electrode; the first common electrode trace is used to receive external common electrode signals, the second common electrode trace is used to receive external common electrode signals, and the third common electrode trace is used to receive external common electrode signals. The control module includes a first control switch group, a second control switch group, and a third control switch group. The first control switch group is located at the input end of the first common electrode trace, the second control switch group is located at the input end of the second common electrode trace, and the third control switch group is located at the input end of the third common electrode trace. The first control switch group includes three sub-active switches, defined as the first sub-active switch, the second sub-active switch, and the third sub-active switch, respectively. The second control switch group includes two sub-active switches, defined as the fourth sub-active switch and the fifth active switch, respectively. The third control switch group includes three sub-active switches, defined as the sixth sub-active switch. The control module further includes a first control line, a second control line, and a third control line. The first control line is connected to the first sub-active switch, the fourth sub-active switch, and the sixth sub-active switch simultaneously, and can be used to simultaneously control the on/off state of the first common electrode trace, the second common electrode trace, and the third common electrode trace. The second control line is connected to the third sub-active switch and the fifth sub-active switch simultaneously, and can be used to simultaneously control the on/off state of the first common electrode trace and the second common electrode trace. The third control line is only connected to the second sub-active switch and can be used to control the on/off state of the first common electrode trace.
4. According to claim 1, the array substrate includes a display area and a non-display area, the display area includes a first temperature area and a second temperature area, a plurality of pixel areas are disposed in the first temperature area, and a plurality of pixel areas are disposed in the second temperature area. The number of sub-common electrodes in a single pixel region within the first temperature region is greater than the number of sub-common electrodes in a single pixel region within the second temperature region.
5. According to claim 4, the array substrate wherein each of the sub-common electrodes has an equal area.
6. According to claim 4, the array substrate further includes a transition region located between the first temperature region and the second temperature region, wherein the number of sub-common electrodes in a single pixel region within the first temperature region is greater than the number of sub-common electrodes in a single pixel region within the transition region, and the number of sub-common electrodes in a single pixel region within the transition region is greater than the number of sub-common electrodes in a single pixel region within the second temperature region.
7. According to the array substrate of claim 6, the number of sub-common electrodes in a single pixel region within the first temperature region is 5, namely a first sub-common electrode, a second sub-common electrode, a third sub-common electrode, a fourth sub-common electrode, and a fifth sub-common electrode; the number of sub-common electrodes in a single pixel region within the transition region is 4, namely a first sub-common electrode, a second sub-common electrode, a third sub-common electrode, and a fourth sub-common electrode; and the number of sub-common electrodes in a single pixel region within the second temperature region is 3, namely a first sub-common electrode, a second sub-common electrode, and a third sub-common electrode.
8. According to claim 7, the array substrate, wherein, The array substrate further includes a fourth control switch group, a fifth control switch group, a fourth control line, a fifth control line, a fourth common electrode trace, and a fifth common electrode trace; The fourth control switch group is located at the input end of the fourth common electrode trace, the fifth control switch group is located at the input end of the fifth common electrode trace, the fourth control switch group includes a seventh sub-active switch and an eighth sub-active switch connected in parallel, and the fifth control switch group includes a ninth sub-active switch; The fourth control line is connected to both the seventh and ninth sub-active switches and can be used to simultaneously control the on/off state of the fourth common electrode trace and the fifth common electrode trace. The fifth control line is connected to the eighth sub-active switch and can be used to control the on/off state of the fourth common electrode trace.
9. According to claim 6, the array substrate further includes a driver chip connection terminal located in the non-display area, and the second temperature region is located on the side of the first temperature region away from the driver chip connection terminal.
10. According to claim 2, the array substrate further includes a first common electrode trace, a second common electrode trace, and a third common electrode trace, all disposed on the substrate; the first common electrode trace is connected to a first sub-common electrode, the second common electrode trace is connected to a second sub-common electrode, and the third common electrode trace is connected to a third common electrode; the first common electrode trace is used to receive an external common electrode signal, the second common electrode trace is used to receive an external common electrode signal, and the third common electrode trace is used to receive an external common electrode signal. The control module includes a sixth control switch group, a seventh control switch group, and an eighth control switch group. The sixth control switch group is located at the input end of the first common electrode trace, the seventh control switch group is located at the input end of the second common electrode trace, and the eighth control switch group is located at the input end of the third common electrode trace. The sixth control switch group includes two sub-active switches, the seventh control switch group includes one sub-active switch, and the eighth control switch group includes one sub-active switch. The control module further includes a first resistor, a second resistor, a third resistor, and a controllable resistor. The first resistor and the second resistor have equal resistance values, and the third resistor has a resistance value less than the first resistor. The first resistor is disposed on the first common electrode trace and located on the side of the sixth control switch group away from the first sub-common electrode. The second resistor is disposed on the second common electrode trace and located on the side of the seventh control switch group away from the second sub-common electrode. The third resistor and the controllable resistor are connected in series on the third common electrode trace and located on the side of the eighth control switch group away from the third sub-common electrode. The controllable resistor can make the sum of the resistances of the third resistor and the controllable resistor greater than or equal to the resistance value of the first resistor. The control module further includes a first control line and a third control line. The first control line is connected to a sub-active switch in the sixth control switch group, a sub-active switch in the seventh control switch group, and a sub-active switch in the eighth control switch group. It can be used to control the on/off state of the first common electrode trace, the second common electrode trace, and the third common electrode trace. The third control line is only connected to another sub-active switch in the sixth control switch group. It can be used to control the on/off state of the first common electrode trace.
11. According to claim 10, the array substrate, wherein the controllable resistor includes an NTC photoresistor.
12. According to claim 10, the sum of the resistance values of the controllable resistor and the third resistor is greater than the resistance value of the first resistor.
13. According to claim 10, the array substrate wherein the sum of the resistance value of the controllable resistor and the resistance value of the third resistor is equal to the resistance value of the first resistor.
14. According to claim 1, the array substrate is wherein the scan line is located in a first metal layer, the data line is located in a second metal layer, the pixel electrode is located in a pixel electrode layer, and the sub-common electrode is located in the first metal layer.
15. According to claim 1, the array substrate is wherein the scan line is located in a first metal layer, the data line is located in a second metal layer, the pixel electrode is located in a pixel electrode layer, and the sub-common electrode is located in a second metal layer.
16. According to the array substrate of claim 3, the scan line is located in a first metal layer, the data line is located in a second metal layer, the pixel electrode is located in a pixel electrode layer, and the sub-common electrode is located in the first metal layer; the first common electrode trace is located in the second metal layer, and the second common electrode trace and the third common electrode trace are located in the first metal layer.
17. A driving method for an array substrate, wherein the driving method is used for the array substrate according to any one of claims 1-16, and the driving method includes the steps of: The temperature on the array substrate is obtained; When the temperature reaches the preset temperature, the control module controls the preset number of sub-common electrodes in the same pixel area to be turned on.
18. The driving method for an array substrate according to claim 17, wherein the array substrate includes a display area and a non-display area, the display area includes a first temperature region and a second temperature region, a plurality of pixel regions are disposed in the first temperature region, and a plurality of pixel regions are disposed in the second temperature region; the number of sub-common electrodes in a single pixel region in the first temperature region is greater than the number of sub-common electrodes in a single pixel region in the second temperature region. The step of obtaining the temperature on the array substrate includes: Obtain the first average temperature of the first temperature region and the second average temperature of the second temperature region; The step of the control module controlling a preset number of sub-common electrodes within the same pixel area to conduct when the temperature reaches a preset temperature includes: When the first average temperature reaches a preset temperature, the control module controls a preset number of sub-common electrodes in the same pixel region within the first temperature region to be turned on; when the second average temperature reaches a preset temperature, the control module controls a preset number of sub-common electrodes in the same pixel region within the second temperature region to be turned on.
19. An electronic paper display panel, comprising an electronic paper film, a temperature acquisition module, and an array substrate as described in any one of claims 1-16, wherein the electronic paper film is attached to the array substrate, the array substrate drives the electronic paper film to display an image, and the temperature acquisition module detects the temperature on the array substrate.
20. According to claim 19, the electronic paper display panel includes an electrophoretic layer and a common electrode layer, the common electrode layer being disposed on the side of the electrophoretic layer facing away from the array substrate, and an electric field being formed between the common electrode layer and the pixel electrode to drive the electrophoretic particles in the electrophoretic layer to move.

Description

Array substrate and its driving method, electronic paper display panel This application claims priority to Chinese Patent Application No. 2024115148522, filed on October 29, 2024, entitled “Array Substrate and Driving Method Thereof, Electronic Paper Display Panel”, the entire contents of which are incorporated herein by reference. Technical Field This application relates to the field of display technology, and in particular to an array substrate and its driving method, and an electronic paper display panel. Background Technology With the development of digital technology, more and more display devices are entering people's lives, such as electronic paper display panels. Electronic paper display panels are made by uniformly dispersing charged particles in a medium solution with a certain viscosity, and using the electric field between the pixel electrodes and the common electrode to make the charged particles undergo electrophoretic motion to display the image. Existing electronic paper display panels that achieve display by driving the movement of electrophoretic particles through an electric field formed between pixel electrodes and a common electrode will exhibit blurry images under high or low temperatures. Summary of the Invention The purpose of this application is to provide an array substrate and its driving method, as well as an electronic paper display panel, to prevent the electronic paper display panel from displaying blurry images at high and low temperatures. This application discloses an array substrate used in an electronic paper display panel. The array substrate includes a substrate, data lines, scan lines, and pixel electrodes. The data lines and scan lines are both disposed on the substrate, and the data lines and scan lines intersect to define multiple pixel regions. The pixel electrodes are disposed on the substrate, and each pixel electrode corresponds to each pixel region. The array substrate further includes a common electrode sheet, which is disposed on the substrate. Each common electrode sheet corresponds one-to-one with each pixel region. One common electrode sheet includes multiple sub-common electrodes, and the orthogonal projection of the pixel electrode in the same pixel region covers the orthogonal projection of multiple sub-common electrodes. The array substrate also includes a control module, which can select the number of sub-common electrodes connected in the same pixel region according to the temperature on the array substrate. Optionally, the number of sub-common electrodes includes three, which are defined as a first sub-common electrode, a second sub-common electrode, and a third sub-common electrode, respectively. The area of the first sub-common electrode is larger than the area of the second sub-common electrode, and the area of the second sub-common electrode is larger than the area of the third sub-common electrode. Optionally, the array substrate further includes a first common electrode trace, a second common electrode trace, and a third common electrode trace, all of which are disposed on the substrate. The first common electrode trace is connected to the first sub-common electrode, the second common electrode trace is connected to the second sub-common electrode, and the third common electrode trace is connected to the third common electrode. The first common electrode trace is used to receive an external common electrode signal, the second common electrode trace is used to receive an external common electrode signal, and the third common electrode trace is used to receive an external common electrode signal. The control module includes a sixth control switch group, a seventh control switch group, and an eighth control switch group. The sixth control switch group is located at the input end of the first common electrode trace, the seventh control switch group is located at the input end of the second common electrode trace, and the eighth control switch group is located at the input end of the third common electrode trace. The sixth control switch group includes two sub-active switches, the seventh control switch group includes one sub-active switch, and the eighth control switch group includes one sub-active switch. The control module further includes a first resistor, a second resistor, a third resistor, and a controllable resistor. The first resistor and the second resistor have equal resistance values, and the third resistor has a resistance value less than the first resistor. The first resistor is disposed on the first common electrode trace and located on the side of the sixth control switch group away from the first sub-common electrode. The second resistor is disposed on the second common electrode trace and located on the side of the seventh control switch group away from the second sub-common electrode. The third resistor and the controllable resistor are connected in series on the third common electrode trace and located on the side of the eighth