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WO-2026092818-A1 - ISOLATED HEAT DISSIPATING SUBSTRATE FOR ELECTRONIC COMPONENTS

WO2026092818A1WO 2026092818 A1WO2026092818 A1WO 2026092818A1WO-2026092818-A1

Abstract

The disclosure relates to an isolated heat dissipating substrate for electronic components. In particular, the disclosure relates to an assembly (100, 200, 300), comprising: a vapor chamber (120) comprising a top plate (113) and a bottom plate (114); wherein one or both of the top and bottom plates (113, 114) are shaped such that a cavity (116) is formed between the tightly joined top and bottom plates (113, 114); wherein the cavity (116) is filled with a working fluid; and an electrically isolating layer (112) attached to one of the two plates (113, 114) of the vapor chamber (120), the electrically isolating layer (112) providing a mounting surface for electronic components that is electrically isolated from the vapor chamber (120).

Inventors

  • ENGEL, ADRIAN
  • SIDDIQUE, Hafiz Abu Bakar

Assignees

  • Huawei Digital Power Technologies Co., Ltd.

Dates

Publication Date
20260507
Application Date
20241028

Claims (14)

  1. 1. An assembly (100, 200, 300), comprising: a vapor chamber (120) comprising a top plate (113) and a bottom plate (114); wherein one or both of the top and bottom plates (113, 114) are shaped such that a cavity (116) is formed between the tightly joined top and bottom plates (113, 114); wherein the cavity (116) is filled with a working fluid; and an electrically isolating layer (112) attached to one of the two plates (113, 114) of the vapor chamber (120), the electrically isolating layer (112) providing a mounting surface that is electrically isolated from the vapor chamber (120).
  2. 2. The assembly (100, 200, 300) of claim 1, wherein one or both of the plates (113, 114) are non- flat shaped in a lateral portion (116a) of the vapor chamber (116) and are flat in a central portion (116b) of the vapor chamber (116); wherein the electrically isolating layer (112) is attached to a flat portion (116b) of the vapor chamber (116).
  3. 3. The assembly (100, 200, 300) of claim 1 or 2, comprising: an electrically conductive layer (111) attached to the electrically isolating layer (112); wherein the electrically isolating layer (112) is electrically isolating the electrically conductive layer (111) from the vapor chamber (120).
  4. 4. The assembly (200) of claim 3, comprising: one or more electronic components (130a, 130b) attached to the electrically conductive layer (111).
  5. 5. The assembly (200) of claim 4, comprising: a bonding layer (131) bonding the one or more electronic components (130a, 130b) to the electrically conductive layer (111).
  6. 6. The assembly (200) of claim 4 or 5, wherein the electrically conductive layer (111) comprises two or more segments (I l la, 111b, 111c) separated from each other; wherein at least one electronic component (130a, 130b) is attached to at least one segment of the two or more segments (I lla, 111b, 111c).
  7. 7. The assembly (200) of claim 6, wherein the two or more segments (Il la, 111b, l l lcj ofthe electrically conductive lay er ( 111 ) are at different electric potentials.
  8. 8. The assembly (200) of claim 6 or 7, wherein the two or more segments (I l la, 111b, 111c) of the electrically conductive layer (111) have different sizes.
  9. 9. The assembly (200) of any of the preceding claims, comprising at least one electronic component (130a, 130b).
  10. 10. The assembly (200) of claim 9, wherein the electronic components (130a, 130b) are of one or several of the following types: power semiconductor device, processor, integrated circuit, light emitting diode, resistor, inductor or capacitor.
  11. 11. The assembly (300) of any of the preceding claims, comprising: one or more electronic components (130a, 130b) attached to a first one (114) of the two plates (113, 114) of the vapor chamber (120) which is not attached to the electrically isolating layer (112); and a bonding layer (131) bonding the one or more electronic components (130a, 130b) to the first one (114) of the two plates (113, 114) of the vapor chamber (120).
  12. 12. The assembly (100, 200, 300) of any of claims 3 to 8, wherein either or both of the electrically conductive layer (111) and the plate (113) of the vapor chamber (120), to which the electrically isolating layer (112) is attached, are made of a metal, wherein the electrically isolating layer (112) is made of a ceramic material, wherein at least one of the electrically conductive layer (111) and the plate (113) of the vapor chamber (120), to which the electrically isolating layer (112) is attached, is interconnected with the electrically isolating layer (112) through a bond between ceramic and metal which is fabricated by means of one of the following technologies: direct bonded copper, DBC, direct bonded aluminum, DBA, active metal brazing, AMB, metal casting direct bonding, MCB.
  13. 13. The assembly (100, 200, 300) of any of the preceding claims, wherein the cavity (116) of the vapor chamber (120) comprises a support structure that is configured to support the top plate (113) and the bottom plate (114) of the vapor chamber (120) against deformation.
  14. 14. The assembly (100, 200, 300) of any of claims 4 to 10, wherein the vapor chamber (120) is configured to dissipate heat generated by the electronic components (130a, 130b) in lateral direction.

Description

ISOLATED HEAT DISSIPATING SUBSTRATE FOR ELECTRONIC COMPONENTS TECHNICAL FIELD The disclosure relates to the field of heat dissipation for electronic components, for example active electronic components such as power semiconductors. The disclosure relates to an assembly with a vapor chamber and an electrically isolating layer. For example, the disclosure relates to an isolated heat dissipating substrate for electronic components and specifically to the combination of an isolating substrate for a power semiconductor module and a vapor chamber. BACKGROUND Within an assembly of power electronic devices (power circuit, power converter), waste heat generated in chip(s) is transferred from a heat source (chip) to a coolant through several functional material layers. Normally, the primary design target for the thermal management of power semiconductor chips is to have this heat cause as small of a temperature gradient between the chip and the coolant as possible. In other words, it is desired to achieve a small thermal resistance between chip and coolant. This goal is accomplished by: Keeping the number of material layers and their thicknesses small, e.g. reducing the distance between chip and coolant in the main direction of the heat flow as much as other design constraints permit; and: Spreading heat perpendicular to the main direction of the heat flow to enlarge the cross-sectional area through which the heat propagates and enters the successive material layer. These design criteria can be conflicting. Adding thermally conductive material into the heat path to enhance heat spreading inevitably increases the vertical distance between heat source and coolant. This tradeoff should be improved. SUMMARY This disclosure provides a concept for improving the above-described design criteria, for example for enhancing heat spreading without significantly increasing the distance between heat source and coolant. The foregoing and other objectives are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures. According to this disclosure an assembly is provided that combines an electrical isolator and a vapor chamber. This assembly can be used as part of a power semiconductor module where it fulfills the functions of an isolating metallized ceramic substrate and a heat spreader as one functional unit. One of the metal layers of the isolating module substrate simultaneously serves as one plate of the vapor chamber. Embodiments described in this disclosure are related to an assembly that serves as an isolating substrate and a heat spreader for power semiconductor devices. The assembly combines the functionalities of a metallized ceramic substrate and a vapor chamber, with a reduced part count, and having a short path between chip and heat sink. The substrate is electrically isolating between one side which is configured to encompass electrically active parts and the opposite side which is configured to dissipate heat generated by the electrically active parts during their operation towards a heat sink. The described assembly introduces a heat spreader in form of a vapor chamber into the heat path, but does not add all the layers of material that would result from adding a metallized ceramic substrate and a vapor chamber as separate subassemblies. In order to describe the disclosure in detail, the following terms and notations will be used. DBC direct bonded copper DBA direct bonded aluminum AMB active metal brazing MCB metal casting direct bonding In this disclosure, electronic components are described. Such electronic components can be active and/or passive devices. Active devices can be power semiconductors, for example. Power semiconductor modules most prominently contain power semiconductor devices, “chips”. While the following statements mention and primarily refer to semiconductor chips, other types of circuit elements that are housed inside the module, be they in the shape of chips or another, are equally within scope. Power semiconductor modules can contain heat spreaders for more effective heat dissipation. In this disclosure, vapor chambers are described. Vapor chambers can be used as heat spreaders for power semiconductor modules. Vapor chambers can be attached to either side of metallized ceramic substrates, both parts together forming a subassembly inside power semiconductor modules. The disclosure presents an innovative assembly combining an electrical isolator and a vapor chamber. In this disclosure, the terms “top” and “bottom” are used to define orientations and positions. These terms refer to an assumed exemplary orientation where the substrate or module is oriented horizontally with the chips located on the upper side and the heat sink located at or towards the lower side of the substrate/module. The drawings show this orientation. The orientation in which the substrate/module is manufactured or mounted can diffe